ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 88

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ATmega88PA Automotive

Manufacturer Part Number
ATmega88PA Automotive
Description
Manufacturer
Atmel Corporation
13.9.3
13.9.4
13.9.5
88
Atmel ATtiny24/44/84 [Preliminary]
TCNT0 – Timer/Counter Register
OCR0A – Output Compare Register A
OCR0B – Output Compare Register B
Table 13-9.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The timer/counter register gives direct access, for both read and write operations, to the
timer/counter unit 8-bit counter. Writing to the TCNT0 register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT0) while the counter is run-
ning, introduces a risk of missing a compare match between TCNT0 and the OCR0x registers.
The Output Compare Register A contains an 8-bit value that is continuously compared with
the counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC0A pin.
The Output Compare Register B contains an 8-bit value that is continuously compared with
the counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC0B pin.
Bit
0x32 (0x52)
Read/Write
Initial Value
Bit
0x36 (0x56)
Read/Write
Initial Value
Bit
0x3C (0x5C)
Read/Write
Initial Value
CS02
0
0
0
0
1
1
1
1
CS01
0
0
1
1
0
0
1
1
Clock Select Bit Description
R/W
R/W
R/W
7
0
7
0
7
0
CS00
0
1
0
1
0
1
0
1
R/W
R/W
R/W
6
0
6
0
6
0
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
clk
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R/W
R/W
R/W
5
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
OCR0A[7:0]
OCR0B[7:0]
TCNT0[7:0]
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
R/W
R/W
R/W
0
0
0
0
0
0
7701E–AVR–02/11
OCR0A
TCNT0
OCR0B

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