SAM3X8C Atmel Corporation, SAM3X8C Datasheet - Page 60

• Manufacturer Part Number: SAM3X8C
• Manufacturer: Atmel Corporation

12.7
12.8
62
62
Pulse Width Modulation Controller (PWM)
High Speed Multimedia Card Interface (HSMCI)
SAM3X/A
SAM3X/A
• One Eight-channel (SAM3A and 144-pin SAM3X) or One Four-channel (100-pin SAM3X) 16-
• Common clock generator, providing Thirteen Different Clocks
• Independent channel programming
• Synchronous Channel mode
• Interfaced with Peripheral DMA (PDC) or with the DMA Controller (DMAC) Channels to
• Two independent event lines which can send up to 4 triggers on ADC within a period
• Three programmable external (PWMFIx pins) and three internal (from ADC, PMC controller
• Stepper motor control (2 Channels)
• Compatibility with MultiMedia Card Specification Version 4.3
• Compatibility with SD Memory Card Specification Version 2.0
• Compatibility with SDIO Specification Version V2.0
• Compatibility with CE-ATA Specification 1.1
• Cards clock rate up to Master Clock divided by 2
• Boot Operation Mode support
• High Speed mode support
• Embedded power management to slow down clock rate when not used
• Supports 2 Multiplexed Slot(s)
bit PWM Controller, 16-bit counter per channel
Reduce Processor Overhead
and Timer 0) Fault Inputs providing an asynchronous protection of outputs without MCU
intervention
– A Modulo n counter providing eleven clocks
– Two independent Linear Dividers working on modulo n counter outputs
– High Frequency Asynchronous clocking mode
– Independent Enable Disable Commands
– Independent Clock Selection
– Independent Period and Duty Cycle, with Double Bufferization
– Programmable selection of the output waveform polarity
– Programmable center or left aligned output waveform
– Independent Output Override for each channel
– Independent complementary Outputs with 12-bit dead time generator for each
– Independent Enable Disable Commands
– Independent Clock Selection
– Independent Period and Duty Cycle, with Double Bufferization
– Synchronous Channels share the same counter
– Mode to update the synchronous channels registers after a programmable number
channel
of periods
11057AS–ATARM–10-Feb-12
11057AS–ATARM–10-Feb-12