IC ANALOG MULTIPLIER 8-SOIC

AD633JR

Manufacturer Part NumberAD633JR
DescriptionIC ANALOG MULTIPLIER 8-SOIC
ManufacturerAnalog Devices Inc
AD633JR datasheets
 

Specifications of AD633JR

Rohs StatusRoHS non-compliantFunctionAnalog Multiplier
Number Of Bits/stages4-QuadrantPackage / Case8-SOIC (3.9mm Width)
No. Of Pins8Peak Reflow Compatible (260 C)No
Frequency Max1MHzIc FunctionAnalog Multiplier IC
Accuracy2 %Accuracy %2%
Output Voltage11VSupply Voltage Max18V
Leaded Process CompatibleNo  
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FEATURES
4-quadrant multiplication
Low cost, 8-lead SOIC and PDIP packages
Complete—no external components required
Laser-trimmed accuracy and stability
Total error within 2% of full scale
Differential high impedance X and Y inputs
High impedance unity-gain summing input
Laser-trimmed 10 V scaling reference
APPLICATIONS
Multiplication, division, squaring
Modulation/demodulation, phase detection
Voltage-controlled amplifiers/attenuators/filters
GENERAL DESCRIPTION
The AD633 is a functionally complete, four-quadrant, analog
multiplier. It includes high impedance, differential X and Y inputs,
and a high impedance summing input (Z). The low impedance
output voltage is a nominal 10 V full scale provided by a buried
Zener. The AD633 is the first product to offer these features in
modestly priced 8-lead PDIP and SOIC packages.
The AD633 is laser calibrated to a guaranteed total accuracy of
2% of full scale. Nonlinearity for the Y input is typically less
than 0.1% and noise referred to the output is typically less than
100 μV rms in a 10 Hz to 10 kHz bandwidth. A 1 MHz bandwidth,
20 V/μs slew rate, and the ability to drive capacitive loads make
the AD633 useful in a wide variety of applications where
simplicity and cost are key concerns.
The versatility of the AD633 is not compromised by its
simplicity. The Z input provides access to the output buffer
amplifier, enabling the user to sum the outputs of two or more
multipliers, increase the multiplier gain, convert the output
voltage to a current, and configure a variety of applications.
Rev. H
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Analog Multiplier
FUNCTIONAL BLOCK DIAGRAM
X1
1
X2
A
1
10V
Y1
1
Y2
Figure 1.
The AD633 is available in 8-lead PDIP and SOIC packages. It is
specified to operate over the 0°C to 70°C commercial temperature
range (J Grade) or the −40°C to +85°C industrial temperature
range (A Grade).
PRODUCT HIGHLIGHTS
1.
The AD633 is a complete four-quadrant multiplier offered
in low cost 8-lead SOIC and PDIP packages. The result is a
product that is cost effective and easy to apply.
2.
No external components or expensive user calibration are
required to apply the AD633.
3.
Monolithic construction and laser calibration make the
device stable and reliable.
4.
High (10 MΩ) input resistances make signal source
loading negligible.
5.
Power supply voltages can range from ±8 V to ±18 V. The
internal scaling voltage is generated by a stable Zener diode;
multiplier accuracy is essentially supply insensitive.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
©2010-2011 Analog Devices, Inc. All rights reserved.
Low Cost
AD633
W
Z
www.analog.com

AD633JR Summary of contents

  • Page 1

    FEATURES 4-quadrant multiplication Low cost, 8-lead SOIC and PDIP packages Complete—no external components required Laser-trimmed accuracy and stability Total error within 2% of full scale Differential high impedance X and Y inputs High impedance unity-gain summing input Laser-trimmed 10 V ...

  • Page 2

    AD633 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 4 Thermal Resistance ...................................................................... 4 ESD ...

  • Page 3

    SPECIFICATIONS T = 25° ± ≥ 2 kΩ Table 1. Parameter TRANSFER FUNCTION MULTIPLIER PERFORMANCE Total Error MIN MAX Scale Voltage Error Supply Rejection Nonlinearity, X Nonlinearity Feedthrough ...

  • Page 4

    AD633 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage Internal Power Dissipation 1 Input Voltages Output Short-Circuit Duration Storage Temperature Range Operating Temperature Range AD633J AD633A Lead Temperature (Soldering, 60 sec) ESD Rating 1 For supply voltages less than ±18 ...

  • Page 5

    ... Rev Page 10V +V – AD633JR/AD633AR (X1 – X2)(Y1 – Y2 10V Figure 3. 8-Lead SOIC Mnemonic Description Y1 Y Multiplicand Noninverting Input Y2 Y Multiplicand Inverting Input −V Negative Supply Rail S Z Summing Input W Product Output +V Positive Supply Rail Multiplicand Noninverting Input X2 X Multiplicand Inverting Input ...

  • Page 6

    AD633 TYPICAL PERFORMANCE CHARACTERISTICS 0dB = 0.1V rms 0dB L –10 –20 –30 10k 100k FREQUENCY (Hz) Figure 4. Frequency Response 700 600 500 400 300 200 –60 –40 – TEMPERATURE (°C) ...

  • Page 7

    FUNCTIONAL DESCRIPTION The AD633 is a low cost multiplier comprising a translinear core, a buried Zener reference, and a unity-gain connected output amplifier with an accessible summing node. Figure 1 shows the functional block diagram. The differential X and Y ...

  • Page 8

    ... These applications show the pin connections for the AD633JN (8-lead PDIP), which differs from the AD633JR (8-lead SOIC). MULTIPLIER CONNECTIONS Figure 11 shows the basic connections for multiplication. The X and Y inputs normally have their negative nodes grounded, but ...

  • Page 9

    Likewise, Figure 15 shows how to implement a divider using a multiplier in a feedback loop. The transfer function for the divider ′ − 10kΩ +15V 0.1µ ...

  • Page 10

    AD633 For example kΩ and C = 0.002 µF, then Output A has a pole at frequencies from 100 kHz for E 100 Output B has an additional 0 ...

  • Page 11

    1kΩ 10kΩ 10kΩ AGC THRESHOLD ADJUSTMENT +15V 0.1µ AD633JN – 0.1µF –15V C2 0.02µF C3 R10 0.2µF 10kΩ A2 ...

  • Page 12

    AD633 OUTLINE DIMENSIONS 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE ...

  • Page 13

    ... AD633JR 0°C to 70°C AD633JR-REEL 0°C to 70°C AD633JR-REEL7 0°C to 70°C AD633JRZ 0°C to 70°C AD633JRZ-R7 0°C to 70°C AD633JRZ-RL 0°C to 70° RoHS Compliant Part. 1 Package Description 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N], 13" ...

  • Page 14

    AD633 NOTES Rev Page ...

  • Page 15

    NOTES Rev Page AD633 ...

  • Page 16

    AD633 NOTES ©2010-2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00786-0-4/11(H) Rev Page ...