AD7988-1 Analog Devices, AD7988-1 Datasheet - Page 18

• Manufacturer Part Number: AD7988-1
• Description: 16-Bit, 100ksps, Ultra Low Power 16-Bit SAR ADC
• Manufacturer: Analog Devices

Specifications of AD7988-1

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 100kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (Vref) p-p,5V p-p,Uni (Vref),Uni 5.0V
• Pkg Type: SOP

AD7988-1/AD7988-5
CS MODE, 3-WIRE
This mode is typically used when a single
connected to an SPI-compatible digital host. The connection
diagram is shown in Figure 34, and the corresponding timing is
given in Figure 35.
With SDI tied to VIO, a rising edge on CNV initiates a conver-
sion, selects the CS mode, and forces SDO to high impedance.
When the conversion is complete, the
acquisition phase and powers down.
ACQUISITION
SDI = 1
CNV
SCK
SDO
CONVERSION
t
AD7988-x
CONV
t
CNVH
AD7988-x
VIO
Figure 35. 3-Wire CS Mode Serial Interface Timing (SDI High)
SDI
enters the
Figure 34. 3-Wire CS Mode Connection Diagram
t
is
EN
AD7988-1/
AD7988-5
D15
CNV
SCK
1
t
Rev. A | Page 18 of 24
HSDO
D14
2
t
CYC
SDO
ACQUISITION
D13
When CNV goes low, the MSB is output onto SDO. The remaining
data bits are then clocked by subsequent SCK falling edges. The
data is valid on both SCK edges. Although the rising edge can
be used to capture the data, a digital host using the SCK falling
edge allows a faster reading rate, provided that it has an acceptable
hold time. After the 16th SCK falling edge or when CNV goes
high, whichever is earlier, SDO returns to high impedance.
t
3
ACQ
t
DSDO
CONVERT
DATA IN
CLK
DIGITAL HOST
t
SCKL
14
t
SCKH
t
SCK
15
D1
16
D0
t
DIS
Data Sheet