AD9257 Analog Devices, AD9257 Datasheet - Page 5

• Manufacturer Part Number: AD9257
• Description: Octal, 14-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
• Manufacturer: Analog Devices

Data Sheet
Parameter
CROSSTALK
ANALOG INPUT BANDWIDTH, FULL POWER
1
2
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −1.0 dBFS, unless otherwise noted.
Table 3.
Parameter
CLOCK INPUTS (CLK+, CLK−)
LOGIC INPUTS (PDWN, SYNC, SCLK)
LOGIC INPUT (CSB)
LOGIC INPUT (SDIO)
LOGIC OUTPUT (SDIO)
DIGITAL OUTPUTS (D± x), ANSI-644
DIGITAL OUTPUTS (D± x), LOW POWER, REDUCED SIGNAL
1
2
3
See the
Overrange condition is specified with 3 dB of the full-scale input range.
See the
This is specified for LVDS and LVPECL only.
This is specified for 13 SDIO/DFS pins sharing the same connection.
Crosstalk (Overrange Condition)
Logic Compliance
Differential Input Voltage
Input Voltage Range
Input Common-Mode Voltage
Input Resistance (Differential)
Input Capacitance
Logic 1 Voltage
Logic 0 Voltage
Input Resistance
Input Capacitance
Logic 1 Voltage
Logic 0 Voltage
Input Resistance
Input Capacitance
Logic 1 Voltage
Logic 0 Voltage
Input Resistance
Input Capacitance
Logic 1 Voltage (I
Logic 0 Voltage (I
Logic Compliance
Differential Output Voltage (V
Output Offset Voltage (V
Output Coding (Default)
OPTION
Logic Compliance
Differential Output Voltage (V
Output Offset Voltage (V
Output Coding (Default)
AN-835 Application
AN-835 Application
1
1
OH
OL
= 50 μA)
3
= 800 μA)
Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.
Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.
OS
OS
2
)
)
OD
OD
)
)
2
Rev. 0 | Page 5 of 40
Temp
25°C
25°C
25°C
Temp
Full
Full
Full
25°C
25°C
Full
Full
25°C
25°C
Full
Full
25°C
25°C
Full
Full
25°C
25°C
Full
Full
Full
Full
Full
Full
Min
Min
0.2
AGND − 0.2
1.2
0
1.2
0
1.2
0
247
1.13
150
1.13
AD9257-40
Typ
−100
−92
650
CMOS/LVDS/LVPECL
Typ
0.9
15
4
30
2
26
2
26
5
1.79
LVDS
350
1.21
LVDS
200
1.21
Twos complement
Twos complement
Max
Min
AD9257-65
Max
3.6
AVDD + 0.2
AVDD + 0.2
0.8
AVDD + 0.2
0.8
AVDD + 0.2
0.8
0.05
454
1.38
250
1.38
Typ
−98
−94
650
Max
AD9257
Unit
dB
dB
MHz
V
Unit
V p-p
V
kΩ
pF
V
V
kΩ
pF
V
V
kΩ
pF
V
V
kΩ
pF
V
V
mV
V
mV
V