AD9634 Analog Devices, AD9634 Datasheet - Page 10

• Manufacturer Part Number: AD9634
• Description: 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9634

• Resolution (bits): 12bit
• # Chan: 1
• Sample Rate: 250MSPS
• Interface: LVDS
• Analog Input Type: Diff-Uni
• Ain Range: 1.75 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

AD9634
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 8. Pin Function Descriptions
Pin No.
ADC Power Supplies
ADC Analog
Digital Outputs
8, 17
3, 27, 28, 31, 32
0
25
30
29
26
1
2
5
4
7
6
10
9
12
11
14
13
16
15
19
18
21
20
Mnemonic
DRVDD
AVDD
AGND, Exposed
Paddle
DNC
VIN+
VIN−
VCM
CLK+
CLK−
OR+
OR−
D0+/D1+ (LSB)
D0−/D1− (LSB)
D2+/D3+
D2−/D3−
D4+/D5+
D4−/D5−
D6+/D7+
D6−/D7−
D8+/D9+
D8−/D9−
D10+/D11+ (MSB)
D10−/ D11− (MSB)
DCO+
DCO−
NOTES
1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED THERMAL PADDLE ON THE BOTTOM OF THE PACKAGE
PROVIDES THE ANALOG GROUND FOR THE PART. THIS EXPOSED
PADDLE MUST BE CONNECTED TO GROUND FOR PROPER OPERATION.
D0+/D1+ (LSB)
D0–/D1– (LSB)
Type
Supply
Supply
Ground
Input
Input
Output
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
DRVDD
AVDD
CLK+
CLK–
OR–
OR+
1
2
3
4
5
6
7
8
Figure 3. Pin Configuration
Rev. 0 | Page 10 of 32
(Not to Scale)
AD9634
TOP VIEW
Description
Digital Output Driver Supply (1.8 V Nominal).
Analog Power Supply (1.8 V Nominal).
Analog Ground. The exposed thermal paddle on the bottom of the
package provides the analog ground for the part. This exposed paddle
must be connected to ground for proper operation.
Do No Connect. Do not connect to this pin.
Differential Analog Input Pin (+).
Differential Analog Input Pin (−).
Common-Mode Level Bias Output for Analog Inputs. This pin should be
decoupled to ground using a 0.1 μF capacitor.
ADC Clock Input—True.
ADC Clock Input—Complement.
Overrange—True.
Overrange—Complement.
DDR LVDS Output Data 0/Data 1—True (LSB).
DDR LVDS Output Data 0/Data 1—Complement (LSB).
DDR LVDS Output Data 2/Data 3—True.
DDR LVDS Output Data 2/Data 3—Complement.
DDR LVDS Output Data 4/Data 5—True.
DDR LVDS Output Data 4/Data 5—Complement.
DDR LVDS Output Data 6/Data 7—True.
DDR LVDS Output Data 6/Data 7—Complement.
DDR LVDS Output Data 8/Data 9—True.
DDR LVDS Output Data 8/Data 9—Complement.
DDR LVDS Output Data 10/Data 11—True (MSB).
DDR LVDS Output Data 10/Data 11—Complement (MSB).
LVDS Data Clock Output—True.
LVDS Data Clock Output—Complement.
24 CSB
23 SCLK
22 SDIO
21 DCO+
20 DCO–
19 D10+/D11+ (MSB)
18 D10–/D11– (MSB)
17 DRVDD