AD9648 Analog Devices, AD9648 Datasheet - Page 26

no-image

AD9648

Manufacturer Part Number
AD9648
Description
14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9648

Resolution (bits)
14bit
# Chan
2
Sample Rate
125MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
(2Vref) p-p,2 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9648BCPZ-105
Manufacturer:
AD
Quantity:
1 001
Part Number:
AD9648BCPZ-125
Manufacturer:
AD
Quantity:
456
Part Number:
AD9648BCPZ-125
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9648BCPZRL7-105
Manufacturer:
ATHEROS
Quantity:
5 194
Part Number:
AD9648BCPZRL7-125
Manufacturer:
AD
Quantity:
456
AD9648
Input Common Mode
The analog inputs of the
Therefore, in ac-coupled applications, the user must provide a
dc bias externally. Setting the device so that VCM = AVDD/2 is
recommended for optimum performance, but the device can
function over a wider range with reasonable performance, as
shown in Figure 43.
An on-board, common-mode voltage reference is included in
the design and is available from the VCM pin. The VCM pin
must be decoupled to ground by a 0.1 µF capacitor, as described
in the Applications Information section.
Differential Input Configurations
Optimum performance is achieved while driving the AD9648 in a
differential input configuration. For baseband applications, the
AD8138, ADA4937-2, and
excellent performance and a flexible interface to the ADC.
The output common-mode voltage of the ADA4938-2 is easily
set with the VCM pin of the
100
90
80
70
60
50
40
30
20
10
0
0.5
Figure 43. SNR/SFDR vs. Input Common-Mode Voltage,
0.6
ANALOG INPUT
ANALOG INPUT
INPUT COMMON-MODE VOLTAGE (V)
0.7
f
IN
SFDR (dBc)
SNR (dBFS)
2V p-p
= 70 MHz, f
AD9648
0.8
ADA4938-2
AD9648
C
D
0.1µF
0.9
S
= 125 MSPS
are not internally dc-biased.
P
0.1µF
0.1µF
A
R
D
(see Figure 44), and the
differential drivers provide
1.0
0Ω
0Ω
S
Figure 47. Differential Input Configuration Using the AD8352
R
G
1.1
Figure 46. Differential Double Balun Input Configuration
16
1
2
3
4
5
S
1.2
AD8352
V
P
CC
8, 13
14
0.1µF
1.3
0.1µF
0.1µF
10
Rev. 0 | Page 26 of 44
11
25Ω
25Ω
0.1µF
0.1µF
driver can be configured in a Sallen-Key filter topology to
provide band limiting of the input signal.
VIN
For baseband applications below ~10 MHz where SNR is a key
parameter, differential transformer-coupling is the recommended
input configuration. An example is shown in Figure 45. To bias
the analog input, the VCM voltage can be connected to the
center tap of the secondary winding of the transformer.
2V p-p
The signal characteristics must be considered when selecting
a transformer. Most RF transformers saturate at frequencies
below a few megahertz (MHz). Excessive signal power can also
cause core saturation, which leads to distortion.
At input frequencies in the second Nyquist zone and above, the
noise performance of most amplifiers is not adequate to achieve
the true SNR performance of the AD9648. For applications above
~10 MHz where SNR is a key parameter, differential double balun
coupling is the recommended input configuration (see Figure 46).
An alternative to using a transformer-coupled input at frequencies
in the second Nyquist zone is to use the
An example is shown in Figure 47. See the AD8352 data sheet
for more information.
0.1µF
200Ω
200Ω
0.1µF
0.1µF
Figure 44. Differential Input Configuration Using the ADA4938-2
76.8Ω
Figure 45. Differential Transformer-Coupled Configuration
R
R
0.1µF
C
R
R
49.9Ω
C
120Ω
90Ω
0.1µF
VIN+x
VIN–x
ADA4938
200Ω
200Ω
ADC
VIN+x
VIN–x
33Ω
33Ω
R
R
VCM
ADC
10pF
C
VCM
AD8352
VIN+x
VIN–x
VIN+x
VIN–x
differential driver.
ADC
ADC
AVDD
VCM
VCM

Related parts for AD9648