AD7608 Analog Devices, AD7608 Datasheet

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AD7608

Manufacturer Part Number
AD7608
Description
8-Channel DAS with 18-Bit, Bipolar, Simultaneous Sampling ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7608

Resolution (bits)
18bit
# Chan
8
Sample Rate
200kSPS
Interface
Par,Ser,SPI
Analog Input Type
Diff-Bip
Ain Range
Bip 10V,Bip 5.0V
Adc Architecture
SAR
Pkg Type
QFP

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Data Sheet
FEATURES
8 simultaneously sampled inputs
True bipolar analog input ranges: ±10 V, ±5 V
Single 5 V analog supply and 2.3 V to 5.25 V V
Fully integrated data acquisition solution
Flexible parallel/serial interface
SPI/QSPI™/MICROWIRE™/DSP compatible
Pin compatible solutions from 14-bits to 18-bits
Performance
64-lead LQFP package
1
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Patent pending.
Analog input clamp protection
Input buffer with 1 MΩ analog input impedance
Second-order antialiasing analog filter
On-chip accurate reference and reference buffer
18-bit ADC with 200 kSPS on all channels
Oversampling capability with digital filter
7 kV ESD rating on analog input channels
98 dB SNR, −107 dB THD
Low power: 100 mW
Standby mode: 25 mW
V1GND
V2GND
V3GND
V4GND
V5GND
V6GND
V7GND
V8GND
V1
V2
V3
V4
V5
V6
V7
V8
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
CLAMP
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
FB
ORDER LPF
ORDER LPF
ORDER LPF
ORDER LPF
ORDER LPF
ORDER LPF
ORDER LPF
ORDER LPF
SECOND
SECOND
SECOND
SECOND
SECOND
SECOND
SECOND
SECOND
AGND
AV
CC
DRIVE
FUNCTIONAL BLOCK DIAGRAM
T/H
T/H
T/H
T/H
T/H
T/H
T/H
T/H
AV
CC
MUX
8:1
8-Channel DAS with 18-Bit, Bipolar,
REGCAP
Figure 1.
2.5V
LDO
18-BIT
SAR
AD7608
CONVST A CONVST B RESET RANGE
REGCAP
2.5V
LDO
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
APPLICATIONS
Power line monitoring and protection systems
Multiphase motor controls
Instrumentation and control systems
Multiaxis positioning systems
Data acquisition systems (DAS)
COMPANION PRODUCTS
External References: ADR421,
Digital Isolators: ADuM1402, ADuM5000,
Voltage Regulator Design Tool: ADIsimPower,
Complete list of complements on
Table 1. High Resolution, Bipolar Input, Simultaneous
Sampling DAS Solutions
Resolution
18 Bits
16 Bits
14 Bits
DIGITAL
FILTER
Parametric Search
Simultaneous Sampling ADC
REFCAPB
CONTROL
CLK OSC
INPUTS
PARALLEL/
INTERFACE
SERIAL
REFCAPA
Single-
Ended
Inputs
AD7608
AD7606
AD7606-6
AD7606-4
AD7607
PARALLEL
SERIAL
2.5V
REF
©2011-2012 Analog Devices, Inc. All rights reserved.
1
True
Differential
Inputs
AD7609
REFIN/REFOUT
REF SELECT
AGND
OS 2
OS 1
OS 0
D
D
RD/SCLK
CS
PAR/SER SEL
V
DB[15:0]
BUSY
FRSTDATA
DRIVE
OUT
OUT
ADR431
A
B
AD7608 product page
Number of
Simultaneous
Sampling Channels
8
8
6
4
8
ADuM5402
AD7608
www.analog.com
Supervisor

Related parts for AD7608

AD7608 Summary of contents

Page 1

... T/H SECOND ORDER LPF R FB AGND CONVST A CONVST B RESET RANGE Figure 1. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 ADR431 ADuM5402 AD7608 product page Single- True Number of Ended Differential Simultaneous Inputs Inputs Sampling Channels 1 AD7608 AD7609 8 AD7606 8 AD7606-6 ...

Page 2

... AD7608 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Companion Products ....................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 General Description ......................................................................... 3 Specifications ..................................................................................... 4 Timing Specifications .................................................................. 6 Absolute Maximum Ratings .......................................................... 10 Thermal Resistance .................................................................... 10 ESD Caution ................................................................................ 10 Pin Configuration and Function Descriptions ........................... 11 Typical Performance Characteristics ........................................... 14 Terminology .................................................................................... 18 Theory of Operation ...................................................................... 19 REVISION HISTORY 1/12—Rev Rev. A Changes to Analog Input Ranges Section ···································· 19 4/11— ...

Page 3

... V reference and reference buffer, and high speed serial and parallel interfaces. The AD7608 operates from a single 5 V supply and can accommodate ±10 V and ±5 V true bipolar input signals while sampling at throughput rates up to 200 kSPS for all channels. ...

Page 4

... AD7608 SPECIFICATIONS V = 2.5 V external/internal 4. 5. REF CC Table 2. Parameter DYNAMIC PERFORMANCE Signal-to-Noise Ratio (SNR Signal-to-(Noise + Distortion) (SINAD) Dynamic Range Total Harmonic Distortion (THD) 2 Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD) 2 Second-Order Terms Third-Order Terms Channel-to-Channel Isolation ...

Page 5

... SINK Twos complement All eight channels included; see Table 3 Per channel, all eight channels included Digital inputs = DRIVE f = 200 kSPS SAMPLE f = 200 kSPS SAMPLE Rev Page AD7608 Min Typ Max Unit ±10 V ±5 V 5.4 µA 2.5 µ MΩ ...

Page 6

... AD7608 TIMING SPECIFICATIONS DRIVE Table 3. Limit at T Parameter Min PARALLEL/SERIAL/BYTE MODE t CYCLE t CONV 3.45 7.87 16. 133 257 t WAKE-UP STANDBY t WAKE-UP SHUTDOWN Internal Reference External Reference t 50 RESET t 20 OS_SETUP t 20 OS_HOLD ...

Page 7

... V DRIVE above 3.3 V DRIVE above 2.7 V DRIVE above 2.3 V DRIVE Rev Page falling edge falling edge A/D B three-state disabled/delay from OUT OUT A/D B valid hold time OUT OUT A/D B three-state enabled OUT OUT AD7608 C S until ...

Page 8

... AD7608 Limit at T Parameter Min Sample tested during initial release to ensure compliance. All input signals are specified with t 2 The delay between the CONVST x signals was measured as the maximum time allowed while ensuring a <40 LSB performance matching between channel sets. ...

Page 9

... CS RD Figure 5. and Linked Parallel Mode DB17 DB16 DB15 t 25 Figure 6. Serial Read Operation (Channel 1) Rev Page [1:0] [17:2] [1: DB1 DB0 AD7608 ...

Page 10

... AD7608 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. Parameter AV to AGND AGND DRIVE Analog Input Voltage to AGND 1 Digital Input Voltage to AGND Digital Output Voltage to AGND REFIN to AGND Input Current to Any Pin Except Supplies 1 Operating Temperature Range B Version Storage Temperature Range ...

Page 11

... When the serial interface is selected, DB[15:9] and DB[6:0] pins should be tied to GND. Standby Mode Input. This pin is used to place the AD7608 into one of two power-down modes: standby mode or shutdown mode. The power-down mode entered depends on the state of the RANGE pin as shown in Table 7 ...

Page 12

... DB15 Description Reset Input. When set to logic high, the rising edge of RESET resets the AD7608. Once t elapsed, the part should receive a RESET pulse after power up. The RESET high pulse should be typically 100 ns wide RESET pulse is applied during a conversion, the conversion is aborted RESET pulse is applied during a read, the contents of the output registers resets to all zeros ...

Page 13

... Analog Inputs. These pins are single-ended analog inputs. The analog input range of these channels is determined by the RANGE pin. Analog Input Ground Pins. These pins correspond to the analog input pins. Connect all analog input AGND pins to the AGND plane of a system. Rev Page AD7608 ...

Page 14

... AD7608 TYPICAL PERFORMANCE CHARACTERISTICS 0 AV INTERNAL REFERENCE –20 f SAMPLE T A –40 ±10V RANGE SNR = 91.23dB –60 SINAD = 91.17dB THD = 108.69dB –80 16384 POINT FFT f IN –100 –120 –140 –160 0 10k 20k 30k 40k 50k 60k INPUT FREQUENCY (Hz) Figure 8. FFT Plot, ±10 V Range ...

Page 15

... Figure 18. PFS/NFS Error vs. Source Resistance 105 100 × × DRIVE OS × CHANGES WITH OS RATE SAMPLE OS × 25°C OS × INTERNAL REFERENCE OS × ±10V RANGE 80 100 10 1k 10k INPUT FREQUENCY (Hz) AD7608 = 100k 120k 100k ...

Page 16

... V CC DRIVE EXTERNAL REFERENCE –40 –25 – TEMPERATURE (° DRIVE INTERNAL REFERENCE AD7608 RECOMMENDED DECOUPLING USED f = 150kSPS SAMPLE T = 25°C A INTERFERER ON ALL UNSELECTED CHANNELS ±10V RANGE ±5V RANGE 100 120 NOISE FREQUENCY (kHz) Figure 25. Channel-to-Channel Isolation ...

Page 17

... OS16 OVERSAMPLING RATIO Figure 29. Supply Current vs. Oversampling Rate 140 130 120 ±10V RANGE 110 ±5V RANGE 100 DRIVE INTERNAL REFERENCE AD7608 RECOMMENDED DECOUPLING USED 200kSPS SAMPLE T = 25° 100 200 300 400 500 600 700 800 ...

Page 18

... The theoretical signal-to-(noise + distortion) ratio for an ideal N-bit converter with a sine wave input is given by Signal-to-(Noise + Distortion) = (6. 1.76) dB Thus, for an 18-bit converter, the signal-to-(noise + distortion) is 110.12 dB. Total Harmonic Distortion (THD) The ratio of the rms sum of the harmonics to the fundamental. For the AD7608 defined as THD (dB ...

Page 19

... AD7608 sampling frequency. This high analog input impedance elimi- nates the need for a driver amplifier in front of the AD7608, allowing for direct connection to the source or sensor. With the need for a driver amplifier eliminated, bipolar supplies (which are often a source of noise in a system) can be removed from the signal chain ...

Page 20

... The conversion clock for the part is internally generated, and ±10V RANGE the conversion time for all channels is 4 µs on the AD7608. The BUSY signal returns low after all eight conversions to indicate the end of the conversion process. On the falling edge of BUSY, the track-and-hold amplifiers return to track mode ...

Page 21

... The AD7608 contains an on-chip 2.5 V band gap reference. The REFIN/REFOUT pin allows access to the 2.5 V reference that generates the on-chip 4.5 V reference internally allows an external reference of 2 applied to the AD7608. An externally applied reference of 2 also gained up to 4.5 V, using the internal buffer. This 4.5 V buffered reference is the reference used by the SAR ADC ...

Page 22

... POWER-DOWN MODES There are two power-down modes available on the AD7608: standby mode and shutdown mode. The whether the AD7608 is in normal mode or in one of the two power-down modes. 10µF EIGHT ANALOG INPUTS ...

Page 23

... A single CONVST x signal is used to control both CONVST x inputs. The rising edge of this common CONVST x signal initiates simultaneous sampling on all analog input channels. The AD7608 contains an on-chip oscillator that is used to perform the conversions. The conversion time for all ADC channels The BUSY signal indicates to the user when ...

Page 24

... SER SEL pin The operation of the interface modes is discussed in the following sections. PARALLEL INTERFACE (PAR/SER SEL = 0) Data can be read from the AD7608 via the parallel data bus with CS RD standard and signals. To read the data over the parallel E E ...

Page 25

... V Data can be read from the AD7608 at any time other than on the falling edge of BUSY because this is when the output data registers get updated with the new conversion data. Time t outlined in Table 3, should be observed in this condition ...

Page 26

... AD7608 DIGITAL FILTER The AD7608 contains an optional digital first-order sinc filter that should be used in applications where slower throughput rates are used or where higher signal-to-noise ratio or dynamic range is desirable. The oversampling ratio of the digital filter is controlled using the oversampling pins, OS [2:0] (see Table 8). ...

Page 27

... CODE Figure 50. Histogram of Codes—OS × Codes) 6000 OVERSAMPLING BY 32 5403 5000 4000 3000 2000 1460 1301 1000 11 0 –2 – CODE Figure 51. Histogram of Codes—OS × Codes) AD7608 ...

Page 28

... Figure 53 to Figure 58 show the digital filter frequency profiles for oversampling oversampling by 64. The combination of the analog antialiasing filter and the oversampling digital filter can be used to eliminate or reduce the complexity of the design of the filter before the AD7608. The digital filtering combines steep roll-off and linear phase response. 0 –10 – ...

Page 29

... DRIVE T = 25°C A ±10V RANGE – –30 –40 –50 –60 –70 –80 –90 –100 1M 10M 100 Rev Page AD7608 DRIVE T = 25°C A ±10V RANGE 10k 100k 1M FREQUENCY (Hz) Figure 58. Digital Filter Response for OS × 10M ...

Page 30

... REFOUT pin and the REFCAPA and REFCAPB pins as close as possible to their respective AD7608 pins and where possible they should be placed on the same side of the board as the AD7608 device. Figure 59 shows the recommended decoupling on the top layer of the AD7608 board. Figure 60 shows bottom layer decoupling ...

Page 31

... AD7608 devices with the reference track running in the north-south direction similar to Figure 61. supply CC supply DRIVE Figure 61. Layout for Multiple AD7608 Devices—Top Layer and Rev Page AD7608 AVCC ...

Page 32

... COMPLIANT TO JEDEC STANDARDS MS-026-BCD Figure 62. 64-Lead Low Profile Quad Flat Package [LQFP] (ST-64-2) Dimensions shown in millimeters Package Description 64-Lead Low Profile Quad Flat Package [LQFP] 64-Lead Low Profile Quad Flat Package [LQFP] Evaluation Board for the AD7608 Converter Evaluation Development D08938-0-1/12(A) Rev Page 12.20 12.00 SQ 11.80 ...

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