AD7608 Analog Devices, AD7608 Datasheet - Page 23

• Manufacturer Part Number: AD7608
• Description: 8-Channel DAS with 18-Bit, Bipolar, Simultaneous Sampling ADC
• Manufacturer: Analog Devices

Specifications of AD7608

• Resolution (bits): 18bit
• # Chan: 8
• Sample Rate: 200kSPS
• Interface: Par,Ser,SPI
• Analog Input Type: Diff-Bip
• Ain Range: Bip 10V,Bip 5.0V
• Adc Architecture: SAR
• Pkg Type: QFP

Data Sheet
CONVERSION CONTROL
Simultaneous Sampling on All Analog Input Channels
The AD7608 allows simultaneous sampling of all analog input
channels. All channels are sampled simultaneously when both
CONVST x pins (CONVST A, CONVST B) are tied together.
A single CONVST x signal is used to control both CONVST x
inputs. The rising edge of this common CONVST x signal
initiates simultaneous sampling on all analog input channels.
The AD7608 contains an on-chip oscillator that is used to
perform the conversions. The conversion time for all ADC
channels is t
conversions are in progress, so when the rising edge of CONVST x
is applied, BUSY goes logic high and transitions low at the end
of the entire conversion process. The falling edge of the BUSY
signal is used to place all eight track-and-hold amplifiers back
into track mode. The falling edge of BUSY also indicates that
the new data can now be read from the parallel bus (DB[15:0]),
or the D
OUT
A and D
CONV
DATA: DB[15:0]
. The BUSY signal indicates to the user when
FRSTDATA
CONVST A
CONVST B
OUT
Figure 41. Simultaneous Sampling on Channel Sets Using Independent CONVST A/CONVST B Signals—Parallel Mode
CS, RD
BUSY
B serial data lines.
V1 TO V4 TRACK-AND-HOLD
ENTER HOLD
t
5
t
CONV
ON ALL 8 CHANNELS
V5 TO V8 TRACK-AND-HOLD
ENTER HOLD
AD7608 CONVERTS
Rev. A | Page 23 of 32
V1
Simultaneously Sampling Two Sets of Channels
The AD7608 also allows the analog input channels to be
sampled simultaneously in two sets. This can be used in power-
line protection and measurement systems to compensate for
phase differences introduced by PT and CT transformers. In a
50 Hz system, this allows for up to 9° of phase compensation; and
in a 60 Hz system, it allows for up to 10° of phase compensation.
This is accomplished by pulsing the two CONVST x pins
independently and is possible only if oversampling is not in
use. CONVST A is used to initiate simultaneous sampling of
the first set of channels (V1 to V4) and CONVST B is used
to initiate simultaneous sampling on the second set of analog
input channels (V5 to V8), as illustrated in Figure 41. On the
rising edge of CONVST A, the track-and-hold amplifiers for
the first set of channels are placed into hold mode. On the
rising edge of CONVST B, the track-and-hold amplifiers for
the second set of channels are placed into hold mode. The con-
version process begins once both rising edges of CONVST x
have occurred; therefore BUSY goes high on the rising edge of
the later CONVST x signal. In Table 3, Time t
maximum allowable time between CONVST x sampling points.
There is no change to the data read process when using two
separate CONVST x signals.
Connect all unused analog input channels to AGND. The results
for any unused channels are still included in the data read because
all channels are always converted.
V2
V8
5
indicates the
AD7608