AD7608 Analog Devices, AD7608 Datasheet - Page 6

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AD7608

Manufacturer Part Number
AD7608
Description
8-Channel DAS with 18-Bit, Bipolar, Simultaneous Sampling ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7608

Resolution (bits)
18bit
# Chan
8
Sample Rate
200kSPS
Interface
Par,Ser,SPI
Analog Input Type
Diff-Bip
Ain Range
Bip 10V,Bip 5.0V
Adc Architecture
SAR
Pkg Type
QFP

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AD7608
TIMING SPECIFICATIONS
AV
Table 3.
Parameter
PARALLEL/SERIAL/BYTE MODE
PARALLEL/BYTE READ
t
t
t
t
t
t
t
t
t
t
t
t
t
t
OPERATION
t
t
t
t
t
CYCLE
CONV
WAKE-UP STANDBY
WAKE-UP SHUTDOWN
RESET
OS_SETUP
OS_HOLD
1
2
3
4
5
6
7
8
9
10
11
12
CC
1 0 F 9 F
2
Internal Reference
External Reference
= 4.75 V to 5.25 V, V
DRIVE
= 2.3 V to 5.25 V, V
Min
3.45
7.87
16.05
33
66
133
257
50
20
20
25
25
0
25
0
0
16
21
25
32
15
22
Limit at T
Typ
5
4
MIN
, T
REF
MAX
Max
5
10.5
4.15
9.1
18.8
39
78
158
315
100
30
13
40
0.5
25
= 2.5 V external reference/internal reference, T
Unit
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ms
ms
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. A | Page 6 of 32
Description
1/throughput rate
Parallel mode, reading during or after conversion; or serial mode: V
3.3 V to 5.25 V, reading during a conversion using D
Serial mode reading during conversion; V
Serial mode reading after a conversion; V
Conversion time
Oversampling off
Oversampling by 2
Oversampling by 4
Oversampling by 8
Oversampling by 16
Oversampling by 32
Oversampling by 64
STBY
standby mode
S TBY
A A
shutdown mode
S TBY
A A
shutdown mode
RESET high pulse width
BUSY to OS x pin setup time
BUSY to OS x pin hold time
CONVST x high to BUSY high
Minimum CONVST x low pulse
Minimum CONVST x high pulse
BUSY falling edge to
Maximum delay allowed between CONVST A, CONVST B rising edges
Maximum time between last
Minimum delay between RESET low to CONVST x high
C S
A A
C S
A A
R D
A A
V
V
V
V
R D
A A
C S
A A
DRIVE
DRIVE
DRIVE
DRIVE
E E
A A
E E
A A
E E
A A
E E
A A
E E
A A
to
to
high pulse width (see Figure 5);
low pulse width
high pulse width
E E
A A
E E
A A
E E
A A
rising edge to CONVST x rising edge; power-up time from
rising edge to CONVST x rising edge; power-up time from
rising edge to CONVST x rising edge; power-up time from
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
R D
A A
R D
A A
E E
A A
E E
A A
setup time
hold time
C S
A A
E E
A A
falling edge setup time
C S
A A
E E
A A
rising edge and BUSY falling edge
A
= T
C S
A A
MIN
E E
A A
and
DRIVE
DRIVE
to T
R D
A A
= 2.3 V, D
= 2.7 V
MAX
E E
A A
linked
, unless otherwise noted.
OUT
OUT
A and D
A and D
Data Sheet
OUT
OUT
B lines
B lines
DRIVE
=
1

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