AD7608 Analog Devices, AD7608 Datasheet - Page 7

• Manufacturer Part Number: AD7608
• Description: 8-Channel DAS with 18-Bit, Bipolar, Simultaneous Sampling ADC
• Manufacturer: Analog Devices

Specifications of AD7608

• Resolution (bits): 18bit
• # Chan: 8
• Sample Rate: 200kSPS
• Interface: Par,Ser,SPI
• Analog Input Type: Diff-Bip
• Ain Range: Bip 10V,Bip 5.0V
• Adc Architecture: SAR
• Pkg Type: QFP

Data Sheet
Parameter
SERIAL READ OPERATION
FRSTDATA OPERATION
t
t
t
t
t
f
t
t
t
t
t
t
t
t
t
SCLK
13
14
15
16
17
18
19
20
21
22
23
24
25
26
3
1 1 F
3
Min
6
6
0.4 t
0.4 t
7
Limit at T
SCLK
SCLK
Typ
MIN
, T
MAX
Max
16
20
25
30
16
21
25
32
22
23.5
17
14.5
11.5
15
20
30
17
23
27
34
22
15
20
25
30
15
20
25
30
16
20
25
30
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. A | Page 7 of 32
Description
Delay from
V
V
V
V
Data access time after
V
V
V
V
Data hold time after
C S
A
Delay from
Frequency of serial read clock
V
V
V
V
Delay from
MSB valid
V
V
V
Data access time after SCLK rising edge
V
V
V
V
SCLK low pulse width
SCLK high pulse width
SCLK rising edge to D
C S
A
Delay from
V
V
V
V
Delay from
V
V
V
V
Delay from
V
V
V
V
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
E
A
E
A
to DB[15:0] hold time
rising edge to D
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
= 2.3 V to 2.7 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
above 4.75 V
above 3.3 V
above 2.7 V
above 2.3 V
C S
A
C S
A
C S
A
C S
A
CS
A
R D
A
E
A
E
A
E
A
E
A
E
A
E
A
until DB[15:0] three-state disabled
rising edge to DB[15:0] three-state enabled
until D
falling edge until FRSTDATA three-state disabled
falling edge until FRSTDATA high, serial mode
falling edge to FRSTDATA high
OUT
R D
A
OUT
OUT
A/D
R D
A
E
A
falling edge
A/D
A/D
E
A
OUT
falling edge
OUT
OUT
B three-state enabled
B three-state disabled/delay from
B valid hold time
AD7608
C S
A
E
A
until