AD9434 Analog Devices, AD9434 Datasheet - Page 19

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AD9434

Manufacturer Part Number
AD9434
Description
12-Bit, 370 MSPS/500 MSPS, 1.8 V Analog-to-Digital Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9434

Resolution (bits)
12bit
# Chan
1
Sample Rate
500MSPS
Interface
Par
Analog Input Type
Diff-Bip
Ain Range
1.5 V p-p,Bip 0.75V
Adc Architecture
Pipelined
Pkg Type
CSP

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THEORY OF OPERATION
The AD9434 architecture consists of a front-end sample-and-
hold amplifier (SHA) followed by a pipelined switched capacitor
ADC. The quantized outputs from each stage are combined into
a final 12-bit result in the digital correction logic. The pipelined
architecture permits the first stage to operate on a new input
sample, whereas the remaining stages operate on preceding
samples. Sampling occurs on the rising edge of the clock.
Each stage of the pipeline, excluding the last, consists of a low
resolution flash ADC connected to a switched capacitor DAC
and interstage residue amplifier (MDAC). The residue amplifier
magnifies the difference between the reconstructed DAC output
and the flash input for the next stage in the pipeline. One bit of
redundancy is used in each stage to facilitate digital correction
of flash errors. The last stage simply consists of a flash ADC.
The input stage contains a differential SHA that can be ac- or
dc-coupled in differential or single-ended mode. The output
staging block aligns the data, carries out the error correction,
and passes the data to the output buffers. The output buffers
are powered from a separate supply, allowing adjustment of the
output voltage swing. During power-down, the output buffers
enter a high impedance state.
ANALOG INPUT AND VOLTAGE REFERENCE
The analog input to the AD9434 is a differential buffer. For best
dynamic performance, match the source impedances driving
VIN+ and VIN− such that common-mode settling errors are
symmetrical. The analog input is optimized to provide superior
wideband performance and requires that the analog inputs be
driven differentially. SNR and SINAD performance degrades
significantly if the analog input is driven with a single-ended
signal.
A wideband transformer, such as Mini-Circuits® ADT1-1WT,
can provide the differential analog inputs for applications that
require a single-ended-to-differential conversion. Both analog
inputs are self-biased by an on-chip reference to a nominal 1.7 V.
An internal differential voltage reference creates positive and
negative reference voltages that define the 1.5 V p-p fixed span
of the ADC core. This internal voltage reference can be adjusted
by means of an SPI control. See the AD9434 Configuration
Using the SPI section for more details.
Rev. A | Page 19 of 28
Differential Input Configurations
Optimum performance is achieved while driving the AD9434
in a differential input configuration. For baseband applications,
the
and a flexible interface to the ADC. The output common-mode
voltage of the AD8138 is easily set to AVDD/2 + 0.5 V, and the
driver can be configured in a Sallen-Key filter topology to pro-
vide band limiting of the input signal.
At input frequencies in the second Nyquist zone and above, the
performance of most amplifiers may not be adequate to achieve
the true performance of the AD9434. This is especially true in
IF undersampling applications where frequencies in the 70 MHz
to 100 MHz range are being sampled. For these applications,
differential transformer coupling is the recommended input
configuration. The signal characteristics must be considered
when selecting a transformer. Most RF transformers saturate at
frequencies below a few megahertz (MHz), and excessive signal
power can cause core saturation, which leads to distortion.
In any configuration, the value of the shunt capacitor, C (see
Figure 43), is dependent on the input frequency and may need
to be reduced or removed.
As an alternative to using a transformer-coupled input at frequen-
cies in the second Nyquist zone, the
can be used (see Figure 43).
1V p-p
AD8138
Figure 41. Differential Input Configuration Using the AD8138
Figure 42. Differential Transformer—Coupled Configuration
1.5V p-p
0.1µF
differential driver provides excellent performance
49.9Ω
499Ω
523Ω
50Ω
0.1µF
AD8138
499Ω
499Ω
15Ω
15Ω
2pF
AD8352
33Ω
33Ω
20pF
AD9434
VIN+
VIN–
differential driver
AD9434
VIN+
VIN–
AVDD
CML
AD9434

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