AD9484 Analog Devices, AD9484 Datasheet - Page 19

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AD9484

Manufacturer Part Number
AD9484
Description
8-Bit, 500 MSPS, 1.8 V Analog-to-Digital Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9484

Resolution (bits)
8bit
# Chan
1
Sample Rate
500MSPS
Interface
Par
Analog Input Type
Diff-Bip
Ain Range
1.5 V p-p,Bip 0.75V
Adc Architecture
Pipelined
Pkg Type
CSP
Table 10. Serial Timing Definitions
Parameter
t
t
t
t
t
t
t
t
t
Table 11. Output Data Format
Input (V)
VIN+ − VIN−
VIN+ − VIN−
VIN+ − VIN−
VIN+ − VIN−
VIN+ − VIN−
DS
DH
CLK
S
H
HIGH
LOW
EN_SDIO
DIS_SDIO
Minimum (ns)
5
2
40
5
2
16
16
1
5
Condition (V)
< −0.75 − 0.5 LSB
= −0.75
= 0
= 0.75
> 0.75 + 0.5 LSB
Description
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the clock
Setup time between CSB and SCLK
Hold time between CSB and SCLK
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
Minimum time for the SDIO pin to switch from an input to an output relative to the SCLK falling
edge (not shown in Figure 39)
Minimum time for the SDIO pin to switch from an output to an input relative to the SCLK rising
edge (not shown in Figure 39)
Offset Binary Output Mode, D7± to D0±
0000 0000
0000 0000
1000 0000
1111 1111
1111 1111
Rev. A | Page 19 of 24
Twos Complement Mode, D7± to D0±
1000 0000
1000 0000
0000 0000
0111 1111
0111 1111
AD9484
OR±
1
0
0
0
1

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