AD7607

Manufacturer Part NumberAD7607
Description8-Channel DAS with 14-Bit, Bipolar, Simultaneous Sampling ADC
ManufacturerAnalog Devices
AD7607 datasheet
 


Specifications of AD7607

Resolution (bits)14bit# Chan8
Sample Rate200kSPSInterfacePar,Ser,SPI
Analog Input TypeSE-BipAin RangeBip 10V,Bip 5.0V
Adc ArchitectureSARPkg TypeQFP
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Page 1/32

Download datasheet (674Kb)Embed
Next
Data Sheet
FEATURES
8 simultaneously sampled inputs
True bipolar analog input ranges: ±10 V, ±5 V
Single 5 V analog supply and 2.3 V to 5.25 V V
Fully integrated data acquisition solution
Analog input clamp protection
Input buffer with 1 MΩ analog input impedance
Second-order antialiasing analog filter
On-chip accurate reference and reference buffer
14-bit ADC with 200 kSPS on all channels
Flexible parallel/serial interface
SPI/QSPI™/MICROWIRE™/DSP compatible
Pin-compatible solutions from 14 bits to 18 bits
Performance
7 kV ESD rating on analog input channels
Fast throughput rate: 200 kSPS for all channels
85.5 dB SNR at 50 kSPS
INL ±0.25 LSB, DNL ±0.25 LSB
Low power: 100 mW at 200 kSPS
Standby mode: 25 mW typical
64-lead LQFP package
1MΩ
R
V1
CLAMP
V1GND
CLAMP
1MΩ
R
1MΩ
R
V2
CLAMP
V2GND
CLAMP
1MΩ
R
1MΩ
R
V3
CLAMP
V3GND
CLAMP
1MΩ
R
1MΩ
R
V4
CLAMP
V4GND
CLAMP
1MΩ
R
1MΩ
R
V5
CLAMP
V5GND
CLAMP
1MΩ
R
1MΩ
R
V6
CLAMP
V6GND
CLAMP
1MΩ
R
1MΩ
R
V7
CLAMP
V7GND
CLAMP
1MΩ
R
1MΩ
R
V8
CLAMP
V8GND
CLAMP
1MΩ
R
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
8-Channel DAS with 14-Bit, Bipolar Input,
Simultaneous Sampling ADC
APPLICATIONS
Power-line monitoring and protection systems
Multiphase motor control
Instrumentation and control systems
DRIVE
Multiaxis positioning systems
Data acquisition systems (DAS)
Table 1. High Resolution, Bipolar Input, Simultaneous
Sampling DAS Solutions
Resolution
18 Bits
16 Bits
14 Bits
FUNCTIONAL BLOCK DIAGRAM
AV
AV
REGCAP
REGCAP
CC
CC
FB
T/H
SECOND-
2.5V
2.5V
ORDER LPF
FB
LDO
LDO
FB
T/H
SECOND-
ORDER LPF
FB
FB
T/H
SECOND-
ORDER LPF
FB
FB
T/H
SECOND-
ORDER LPF
FB
8:1
MUX
14-BIT
DIGITAL
FB
FILTER
SAR
T/H
SECOND-
ORDER LPF
FB
FB
T/H
SECOND-
ORDER LPF
FB
AD7607
FB
T/H
SECOND-
ORDER LPF
FB
FB
T/H
SECOND-
ORDER LPF
FB
AGND
CONVST A CONVST B RESET RANGE
Figure 1.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Single-Ended
Number of Simultaneous
Inputs
Sampling Channels
AD7608
8
AD7606
8
AD7606-6
6
AD7606-4
4
AD7607
8
REFCAPB REFCAPA
REFIN/REFOUT
REF SELECT
2.5V
REF
AGND
OS 2
OS 1
OS 0
D
A
OUT
SERIAL
D
B
OUT
PARALLEL/
RD/SCLK
SERIAL
CS
INTERFACE
PAR/SER/BYTE SEL
V
DRIVE
PARALLEL
DB[15:0]
CLK OSC
BUSY
CONTROL
INPUTS
FRSTDATA
©2010-2012 Analog Devices, Inc. All rights reserved.
AD7607
www.analog.com

AD7607 Summary of contents

  • Page 1

    ... AD7606-6 6 AD7606-4 4 AD7607 8 REFCAPB REFCAPA REFIN/REFOUT REF SELECT 2.5V REF AGND OUT SERIAL D B OUT PARALLEL/ RD/SCLK SERIAL CS INTERFACE PAR/SER/BYTE SEL V DRIVE PARALLEL DB[15:0] CLK OSC BUSY CONTROL INPUTS FRSTDATA ©2010-2012 Analog Devices, Inc. All rights reserved. AD7607 www.analog.com ...

  • Page 2

    ... AD7607 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 General Description ......................................................................... 3 Specifications ..................................................................................... 4 Timing Specifications .................................................................. 6 Absolute Maximum Ratings .......................................................... 10 Thermal Resistance .................................................................... 10 ESD Caution ................................................................................ 10 Pin Configuration and Function Descriptions ........................... 11 Typical Performance Characteristics ........................................... 14 Terminology .................................................................................... 18 Theory of Operation ...................................................................... 19 Converter Details........................................................................ 19 Analog Input ............................................................................... 19 REVISION HISTORY 1/12—Rev Rev. B Changes to Analog Input Ranges Section .................................... 19 7/10— ...

  • Page 3

    ... V reference and reference buffer; and high speed serial and parallel interfaces. The AD7607 operates from a single 5 V supply and can accom- modate ±10 V and ±5 V true bipolar input signals while sampling at throughput rates 200 kSPS for all channels. The input 1 Patent pending ...

  • Page 4

    ... AD7607 SPECIFICATIONS V = 2.5 V external/internal 4. 5. REF CC Table 2. Parameter DYNAMIC PERFORMANCE Signal-to-(Noise + Distortion) (SINAD) Signal-to-Noise Ratio (SNR) 2 Total Harmonic Distortion (THD) 2 Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD) 2 Second-Order Terms Third-Order Terms Channel-to-Channel Isolation 2 ANALOG INPUT FILTER ...

  • Page 5

    ... Test Conditions/Comments REF SELECT = 1 REFIN/REFOUT I = 100 µA SOURCE I = 100 µA SINK Twos complement All eight channels included; see Table 3 All eight channels included Digital inputs = DRIVE Rev Page AD7607 Min Typ Max Unit 2.475 2.5 2.525 V ±1 µA 7.5 pF 2.49/ V 2.505 ± ...

  • Page 6

    ... AD7607 TIMING SPECIFICATIONS DRIVE Table 3. Limit at T Parameter Min PARALLEL/SERIAL/BYTE MODE t CYCLE t CONV 3.45 7.87 16. 133 257 t WAKE-UP STANDBY t WAKE-UP SHUTDOWN Internal Reference External Reference t 50 RESET t 20 OS_SETUP t 20 OS_HOLD ...

  • Page 7

    ... DRIVE above 2.3 V DRIVE Delay from RD falling edge to FRSTDATA high above 4.75 V DRIVE above 3.3 V DRIVE above 2.7 V DRIVE above 2.3 V DRIVE Rev Page A/D B three-state disabled/delay from CS OUT OUT A/D B valid hold time OUT OUT A/D B three-state enabled OUT OUT AD7607 ...

  • Page 8

    ... AD7607 Limit at T Parameter Min Sample tested during initial release to ensure compliance. All input signals are specified with t 2 The delay between the CONVST x signals was measured as the maximum time allowed while ensuring a <3 LSB performance matching between channel sets. ...

  • Page 9

    ... HIGH LOW INVALID BYTE V1 BYTE Figure 7. BYTE Mode Read Operation Rev Page DB1 DB0 HIGH LOW BYTE V8 BYTE AD7607 ...

  • Page 10

    ... AD7607 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. Parameter AV to AGND AGND DRIVE Analog Input Voltage to AGND 1 Digital Input Voltage to AGND Digital Output Voltage to AGND REFIN to AGND Input Current to Any Pin Except Supplies 1 Operating Temperature Range B Version Storage Temperature Range ...

  • Page 11

    ... Table 8). DB14 is used as the HBEN pin. DB[7:0] transfer the 16-bit conversion results in two RD operations, with DB0 as the LSB of the data transfers. Standby Mode Input. This pin is used to place the AD7607 into one of two power-down modes: standby mode or shutdown mode. The power-down mode entered depends on the state of the RANGE pin, as shown in Table 7 ...

  • Page 12

    ... When the CONVST A or CONVST B pin transitions from low to high, the front-end track-and-hold circuitry for their respective analog inputs is set to hold. Reset Input. When set to logic high, the rising edge of RESET resets the AD7607. The part should receive a RESET pulse after power-up. The RESET high pulse should typically wide RESET pulse is applied during a conversion, the conversion is aborted ...

  • Page 13

    ... DB14 of the conversion result, which is a sign extended bit of the MSB, DB13. When PAR/SER/BYTE SEL = 1 and DB15/BYTE SEL = 1, the AD7607 operates in parallel byte interface mode, in which the HBEN pin is used to select if the most significant byte (MSB) or the least significant byte (LSB) of the conversion result is output first ...

  • Page 14

    ... AD7607 TYPICAL PERFORMANCE CHARACTERISTICS 0 AV INTERNAL REFERENCE –20 f SAMPLE T A ±10V RANGE –40 SNR: 85.07dB THD: –107.33dB 16,384 POINT FFT – –80 –100 –120 –140 –160 INPUT FREQUENCY (kHz) Figure 9. FFT ± Range 0 AV INTERNAL REFERENCE – ...

  • Page 15

    ... INPUT FREQUENCY (Hz) Figure 19. SNR vs. Input Frequency ± Range AVCC = VDRIVE = 5V INTERNAL REFERENCE f = 200kSPS SAMPLE 25°C A ±10V RANGE ALL 8 CHANNELS 80 10 100 1k 10k INPUT FREQUENCY (Hz) Figure 20. SNR vs. Input Frequency ± Range AD7607 100k 120k = 5V 100k 100k ...

  • Page 16

    ... AD7607 0.25 0.20 0.15 0.10 0. RANGE –0.05 –0.10 10V RANGE –0.15 200kSPS –0.20 AV EXTERNAL REFERENCE –0.25 –40 –25 – TEMPERATURE (°C) Figure 21. Bipolar Zero Code Error vs. Temperature 1.00 0.75 5V RANGE 0.50 0.25 10V RANGE 0 –0.25 –0.50 200kSPS –0.75 AV EXTERNAL REFERENCE –1.00 –40 –25 – TEMPERATURE (°C) Figure 22. Bipolar Zero Code Error Matching vs. Temperature – ...

  • Page 17

    ... OS16 OVERSAMPLING RATIO Figure 27. Supply Current vs. Oversampling Rate 140 130 120 ±10V RANGE 110 ±5V RANGE 100 DRIVE INTERNAL REFERENCE AD7607 RECOMMENDED DECOUPLING USED 200kSPS SAMPLE T = 25° 100 200 300 400 500 600 700 AV NOISE FREQUENCY (kHz) CC Figure 28 ...

  • Page 18

    ... The theoretical signal-to-(noise + distortion) ratio for an ideal N-bit converter with a sine wave input is given by Signal-to-(Noise + Distortion) = (6. 1.76) dB Thus, for a 14-bit converter, the signal-to-(noise + distortion) is 86.04 dB. Total Harmonic Distortion (THD) The ratio of the rms sum of the harmonics to the fundamental. For the AD7607 defined as THD (dB ...

  • Page 19

    ... AD7607 sampling frequency. This high analog input impedance elimi- nates the need for a driver amplifier in front of the AD7607, allowing for direct connection to the source or sensor. With the need for a driver amplifier eliminated, bipolar supplies (which are often a source of noise in a system) can be removed from the signal chain ...

  • Page 20

    ... The conversion clock for the part is internally generated, and the conversion time for all channels is 4 µs. On the AD7607, the BUSY signal returns low after all eight conversions to indicate the end of the conversion process. On the falling edge of BUSY, the track-and-hold amplifiers return to track mode. New data can ± ...

  • Page 21

    ... The AD7607 contains an on-chip 2.5 V bandgap reference. The REFIN/REFOUT pin allows access to the 2.5 V reference that generates the on-chip 4.5 V reference internally allows an external reference of 2 applied to the AD7607. An externally applied reference of 2 also gained up to 4.5 V, using the internal buffer. This 4.5 V buffered reference is the reference used by the SAR ADC ...

  • Page 22

    ... There are four AVCC supply pins on the part, and each of the four pins should be decoupled using a 100 nF capacitor at each supply pin and a 10 µF capacitor at the supply source. The AD7607 can operate with the internal reference or an externally applied reference. In this configuration, the AD7607 is configured to operate with the internal reference ...

  • Page 23

    ... OUT OUT (DB[7:0]). Simultaneously Sampling Two Sets of Channels The AD7607 also allows the analog input channels to be sampled simultaneously in two sets. This can be used in power-line protection and measurement systems to compensate for phase differences between current and voltage sensors system, this allows for up to 9° of phase compensation; and system, it allows for up to 10° ...

  • Page 24

    ... Figure 5. In this case, the data bus comes out of three-state on the falling edge The combined CS and RD signal allows the data to be clocked out of the AD7607 and to be read by the digital host. In this case used to frame the data transfer of each data channel. ...

  • Page 25

    ... OUT OUT used as a OUT READING DURING CONVERSION Data can be read from the AD7607 while BUSY is high and the conversions are in progress. This has little effect the performance B. OUT of the converter, and it allows a faster throughput rate to be achieved. A parallel, parallel byte, or serial read can be performed during conversions and when oversampling not enabled ...

  • Page 26

    ... AD7607 DIGITAL FILTER The AD7607 contains an optional first-order digital sinc filter that should be used in applications where slower throughput rates are used and digital filtering is required. The oversampling ratio of the digital filter is controlled using the oversampling pins, OS[2:0] (see Table 9 the MSB control bit, and the LSB control bit ...

  • Page 27

    ... Figure 44 to Figure 49 show the digital filter frequency profiles for the different oversampling ratios. The combination of the analog antialiasing filter and the oversampling digital filter helps to reduce the complexity of the design of the filter before the AD7607. The digital filtering combines steep roll-off and linear phase response. 0 – ...

  • Page 28

    ... AD7607 2000 1800 1600 1400 1200 1000 800 600 400 200 0 –2 –1 0 CODE Figure 50. Histogram of Codes, Oversampling the OS[2:0] pins are set to select an oversampling ratio of 8, for example, the next CONVST x rising edge takes the first sample for each channel. The remaining seven samples for all channels are taken with an internally generated sampling signal ...

  • Page 29

    ... In the case of the split plane, the digital and analog ground planes should be joined in only one place, preferably as close as possible to the AD7607. If the AD7607 system where multiple devices require analog-to-digital ground connections, the connection should still be made at only one point: a star ground point that should be established as close as possible to the AD7607 ...

  • Page 30

    ... Figure 54 shows a layout with two AD7607 devices. The AV supply plane runs to the right of both devices. The V track runs to the left of the two AD7607 devices. The reference chip is positioned between the two AD7607 devices, and the reference voltage track runs north to Pin and south to Pin ...

  • Page 31

    ... COMPLIANT TO JEDEC STANDARDS MS-026-BCD Figure 55. 64-Lead Low Profile Quad Flat Package [LQFP] (ST-64-2) Dimensions shown in millimeters Package Description 64-Lead Low Profile Quad Flat Package [LQFP] 64-Lead Low Profile Quad Flat Package [LQFP] Evaluation Board Converter Evaluation Development Rev Page AD7607 49 48 10.20 10. 0.27 0.22 ...

  • Page 32

    ... AD7607 NOTES ©2010-2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08096-0-1/12(B) Rev Page Data Sheet ...