AD9963 Analog Devices, AD9963 Datasheet - Page 23

• Manufacturer Part Number: AD9963
• Description: 10-/12-Bit, Low Power, Broadband MxFE
• Manufacturer: Analog Devices

Specifications of AD9963

• Resolution (bits): 12bit
• Throughput Rate: 100MSPS
• # Chan: 2
• Supply V: Multi(+1.8Anlg, +1.8Dig),Multi(+1.8Anlg, +3.3Dig) ,Single(+1.8),Single(+3.3)
• Sample Rate: 100MSPS
• Adc Bits X #adcs-speed: 12x2-100 MHz
• Dac Bits X #dacs-clkspeed: 12x2-170 MHz
• Pkg Type: CSP
• Primary Application: Broadband Wireless

CONFIGURATION REGISTERS
Table 14. Configuration Register Map
Addr
0x3D
0x6D
0x00
0x05
0x0F
0x10
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x50
0x51
0x52
0x53
0x54
0x55
0x5C
0x60
0x61
0x62
0x63
0x66
0x68
0x69
0x6A
0x6B
0x6C
0x6E
Default
Varies
Varies
0xA7
0xA7
0x18
0x00
0x00
0x00
0x3F
0x10
0x08
0x10
0x06
0x00
0x51
0x51
0xF0
0x00
0x09
0x07
0x01
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x93
0x34
0x5F
0x36
0x08
0x00
0x00
0xF8
0x00
0x28
0x00
0x00
0x00
0x00
0x00
0x00
0x40
Bit 7
SDIO
TX_SDR
Unused
RXDLLRST
Unused
DAC12B_EN
DAC10B_EN
DAC10A_EN
DLL_EN
Unused
DLL_LDO_
STAT
TXI_DCLK
RX_SDR
RX_UNLOCK[1:0]
TX_UNLOCK[1:0]
TRXD_DRV
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Bit 6
LSB First
TXCKO_INV
FIFO_INIT
TXDLLRST
RX_CLK
DAC12A_EN
TXDAC_PD
DLL_LDO_PD
CLK_LDO_STAT
TXQ_DCLK
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Bit 5
Reset
DEC_BP
Aligned
RX_BUS
DAC12B_TOP
TXI_SLEEP
DLLBIAS_PD
RX_LDO_
STAT
Unused
TXCLK_MD[1:0]
RXCLK_MD[1:0]
TX_LOCK[1:0]
RX_LOCK[1:0]
TRXIQ_DRV
Unused
Unused
Unused
Unused
Rev. 0 | Page 23 of 60
Bit 4
1
INT1_BP
ALIGN_ACK
SINGLERX
DAC12A_TOP
TX_PTTRN
RX_PTTRN
TXQ_SLEEP
CLK_LDO_PD
RXF_LDO_
STAT
RXI_DCLK
TX_DBLPW[2:0]
DBL_TAPDLY[7:0]
TXQ_CHK[15:8]
DAC12A[11:4]
TXI_CHK[15:8]
TXQ_CHK[7:0]
FIFO_LVL[7:0]
DAC12B[11:4]
TXI_CHK[7:0]
DAC10B[9:2]
DAC10A[9:2]
Chip ID[7:0]
DAC10A_TOP[2:0]
DAC10B_TOP[2:0]
Bit 3
1
INT0_BP
TXCKI_INV
RXCLK_INV
ALIGN_REQ
RXDLL_LKD
RX_INVQ
TXCLK_MD
TX_INSEL
RX_INSEL
CLK_PD
RX_LDO_PD
DIG_LDO_
STAT
RXQ_DCLK
ADC_OFFSET[5:0]
TX_DLYOFS[1:0]
RX_DLYOFS[1:0]
REFIO_ADJ[5:0]
QGAIN1[5:0]
QGAIN2[5:0]
TRXCLK_DRV
IGAIN1[5:0]
IGAIN2[5:0]
QRSET[5:0]
IRSET[5:0]
Unused
SRRC_SCALE[4:0]
INT0_SCALE[4:0]
INT1_SCALE[4:0]
DEC_SCALE[4:0]
Bit 2
Reset
SRRC_BP
TXIQ_HILO
RXIQ_HILO
TXDLL_LKD
RX_INVI
HD_BUSCTL
TX_CONT
RX_CONT
RXADC_PD
RXF_LDO_PD
Unused
DCS_BP
DAC12A[3:0]
DAC12B[3:0]
FIFO_OFFSET[2:0]
RX_DBLPW[2:0]
Bit 1
LSB First
ADDRQ
RXCML
TXCLK_EN
TX_IFIRST
RX_IFIRST
RXDBL_SEL
TX_INVQ
HD_CLKMD
AUXDAC_
REF
TX_START
RX_START
RXQ_SLEEP
AUXADC_PD
Unused
AD9961/AD9963
DAC10A_RNG[1:0]
DAC10B_RNG[1:0]
TX_HYST[1:0]
RX_HYST[1:0]
DAC10A[1:0]
DAC10B[1:0]
ADCDIV[1:0]
TXCLK_DRV
Bit 0
SDIO
ADDRI
RXCLK_EN
TX_BNRY
RX_BNRY
TXDBL_SEL
TX_INVI
FULL_DUPLEX
DAC_
UPDATE
TX_BISTEN
RX_BISTEN
RXI_SLEEP
AUX_REF_PD
RSET_SEL