AD9963 Analog Devices, AD9963 Datasheet - Page 34

• Manufacturer Part Number: AD9963
• Description: 10-/12-Bit, Low Power, Broadband MxFE
• Manufacturer: Analog Devices

Specifications of AD9963

• Resolution (bits): 12bit
• Throughput Rate: 100MSPS
• # Chan: 2
• Supply V: Multi(+1.8Anlg, +1.8Dig),Multi(+1.8Anlg, +3.3Dig) ,Single(+1.8),Single(+3.3)
• Sample Rate: 100MSPS
• Adc Bits X #adcs-speed: 12x2-100 MHz
• Dac Bits X #dacs-clkspeed: 12x2-170 MHz
• Pkg Type: CSP
• Primary Application: Broadband Wireless

AD9961/AD9963
Register Name
Rx ADC Trim Ctrl
IGAIN CAL MSBs
IGAIN CAL LSBS
IGAIN CAL MSBs
IGAIN CAL LSBs
IGAIN CAL LSBS
Register
Address
0x7E
0x7F
0x80
0x81
0x82
0xFF
Bit(s)
7
6
5
4
3:1
0
7:0
7:3
2:1
0
7:0
7:3
2:1
0
7:1
0
Parameter
Unused
RXTrim_EN
RXTrim_Fine
AUXCML_EN
0
RX_DC
RXI_Trim[9:2]
Unused
RXI_Trim[1:0]
GAINCAL_ENI
RXQ_Trim[9:2]
Unused
RXQ_Trim[1:0]
GAINCAL_ENQ
Unused
Update
Rev. 0 | Page 34 of 60
Function
1: enables ADC gain calibration.
1: decreases the step size (increases resolution) of the gain calibration
adjustment.
Controls the buffers of internal bias points within each of the Rx ADCs to
allow for checking of this voltage. These voltages should read back about
0.9 V.
0: disables the buffers.
1: enables the buffers.
Set to 000.
0: the ADC common-mode buffer is active. This sets the ADC inputs to
the desired common-mode voltage through 10 kΩ resistors to each
single sided input.
1: disables the common-mode buffer. The buffer should be disabled
whenever the user DC couples to the ADC inputs.
The RXI_Trim[9:0] word is used to adjust the gain of the receive path I
ADC. These bits have no effect unless the RXTrim_EN bit is set. The
RXTrim_Fine bit reduces the LSB size of the calibration word by ½.
1: enables the gain calibration DAC for the I Rx ADC.
The RXQ_Trim[9:0] word is used to adjust the gain of the receive path Q
ADC. These bits have no effect unless the RXTrim_EN bit is set. The
RXTrim_Fine bit reduces the LSB size of the calibration word by ½.
Bottom two LSBs of RXQ_Trim described in Register 0x81 above.
1: enables the gain calibration DAC for the Q Rx ADC.
Synchronously transfers ADC configuration data from the global register
set to the local ADC register set and activates the changes. A 0-to-1
transition is required to initiate the transfer.
1: transfer ADC parameters to ADC to make changes active.