AD9262 Analog Devices, AD9262 Datasheet - Page 31

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AD9262

Manufacturer Part Number
AD9262
Description
16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD9262

Resolution (bits)
16bit
# Chan
2
Sample Rate
160MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
2 V p-p
Adc Architecture
Sigma-Delta
Pkg Type
CSP
Register
Output Modes
Output Adjust
Output Clock
Reference
Output Data
Overrange
QEC1
QEC2
Address
0x14
0x15
0x16
0x18
0x101
0x111
0x112
0x113
Bit(s)
7
5
4
2
[1:0]
[3:2]
[1:0]
7
6
6
[5:0]
7
6
[5:0]
5
4
3
2
1
0
2
1
0
Mnemonic
DRVSTD
Interleave
OUTENB
OUTINV
Format
DRVSTR33
DRVSTR18
DCOINV
EXTREF
QEC
KOUT
AUTORST
OR_IND
ORTHRESH
DCFRZ
PHASEFRZ
GAINFRZ
DCENB
PHASEENB
GAINENB
DCFRC
PHASEFRC
GAINFRC
0
0
0
0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Default
0
0
0
Rev. A | Page 31 of 32
Description
0: 3.3 V
1: 1.8 V
1: interleave both channels onto D[15:0]A
1: data outputs tristated
1: data outputs bitwise inverted
0: offset binary
1: twos complement
2: Gray code
3: offset binary
Typical output sink current to DGND
0: 33 mA
1: 63 mA
2: 93 mA
3: 120 mA
Typical output sink current to DGND
0: 10 mA
1: 20 mA
2: 30 mA
3: 39 mA
1: invert DCO
1: use external reference
1: enable quadrature error correction
Output data rate, see Table 18
1: enable loop filter reset indicator on ORx pin
Refer to Table 21
Refer to Table 20
1: freeze dc correction coefficients
1: freeze phase correction coefficients
1: freeze gain correction coefficients
1: disable dc correction
1: disable phase correction
1: disable gain correction
1: force dc correction coefficients to initial static values
1: force phase correction coefficients to initial static values
1: force gain correction coefficients to initial static values
AD9262

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