AD9269 Analog Devices, AD9269 Datasheet - Page 9

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AD9269

Manufacturer Part Number
AD9269
Description
16-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9269

Resolution (bits)
16bit
# Chan
2
Sample Rate
80MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
2 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP

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TIMING SPECIFICATIONS
Table 5.
Parameter
SYNC TIMING REQUIREMENTS
SPI TIMING REQUIREMENTS
t
t
t
t
t
t
t
t
t
t
t
SSYNC
HSYNC
DS
DH
CLK
S
H
HIGH
LOW
EN_SDIO
DIS_SDIO
Conditions
SYNC to rising edge of CLK setup time
SYNC to rising edge of CLK hold time
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the SCLK
Setup time between CSB and SCLK
Hold time between CSB and SCLK
SCLK pulse width high
SCLK pulse width low
Time required for the SDIO pin to switch from an input to an
output relative to the SCLK falling edge
Time required for the SDIO pin to switch from an output to an
input relative to the SCLK rising edge
SYNC
CLK+
t
Figure 4. SYNC Input Timing Requirements
SSYNC
Rev. 0 | Page 9 of 40
t
HSYNC
Min
2
2
40
2
2
10
10
10
10
Typ
0.24
0.40
Max
AD9269
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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