AD7194 Analog Devices, AD7194 Datasheet - Page 6

• Manufacturer Part Number: AD7194
• Description: 8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
• Manufacturer: Analog Devices

Specifications of AD7194

• Resolution (bits): 24bit
• # Chan: 8
• Sample Rate: n/a
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref/PGA Gain) p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: CSP

AD7194
Parameter
SYSTEM CALIBRATION
POWER REQUIREMENTS
1
2
3
4
5
6
7
Temperature range: −40°C to +105°C.
Specification is not production tested, but is supported by characterization data at initial product release.
FS[9:0] is the decimal equivalent of Bit FS9 to Bit FS0 in the mode register.
Following a system or internal zero-scale calibration, the offset error is in the order of the noise for the programmed gain and output data rate selected. A system
The analog inputs are configured for differential mode.
REJ60 is a bit in the mode register. When the first notch of the sinc filter is at 50 Hz, a notch is placed at 60 Hz when REJ60 is set to 1. This gives simultaneous
50 Hz/60 Hz rejection.
Digital inputs equal to DV
full-scale calibration reduces the gain error to the order of the noise for the programmed gain and output data rate.
Full-Scale Calibration Limit
Zero-Scale Calibration
Input Span
Power Supply Voltage
AV
DV
Power Supply Currents
Limit
DD
AI
DI
I
DD
DD
DD
DD
− AGND
− DGND
Current
Current
2
7
DD
or DGND.
Min
−1.05 × FS
0.8 × FS
3
2.7
Typ
0.85
1
2.8
3.2
3.8
4.3
0.35
0.5
1.5
Rev. 0 | Page 6 of 56
Max
1.05 × FS
2.1 × FS
5.25
5.25
1.1
1.35
3.6
3.85
4.7
5.3
0.4
0.6
3
Unit
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
Test Conditions/Comments
Gain = 1, buffer off
Gain = 1, buffer on
Gain = 8, buffer off
Gain = 8, buffer on
Gain = 16 to 128, buffer off
Gain = 16 to 128, buffer on
DV
DV
External crystal used
Power-down mode
DD
DD
= 3 V
= 5 V
1