AD7985

Manufacturer Part NumberAD7985
Description16-Bit, 2.5 MSPS PulSAR 11 mW ADC in QFN
ManufacturerAnalog Devices
AD7985 datasheet
 


Specifications of AD7985

Resolution (bits)16bit# Chan1
Sample Rate2.5MSPSInterfaceSer,SPI
Analog Input TypeSE-UniAin Range(Vref) p-p,Uni (Vref)
Adc ArchitectureSARPkg TypeCSP
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FEATURES
16-bit resolution with no missing codes
Throughput: 2.5 MSPS (TURBO high), 2.0 MSPS (TURBO low)
Low power dissipation
15.5 mW at 2.5 MSPS, with external reference
28 mW at 2.5 MSPS, with internal reference
INL: ±0.7 LSB typical, ±1.5 LSB maximum
SNR
88.5 dB, with on-chip reference
90 dB, with external reference
4.096 V internal reference: typical drift of ±10 ppm/°C
Pseudo differential analog input voltage range
0 V to V
with V
up to 5.0 V
REF
REF
Allows use of any input range
No pipeline delay
Logic interface: 1.8 V/2.5 V/2.7 V
Serial interface: SPI-/QSPI™-/MICROWIRE™-/DSP-compatible
Ability to daisy-chain multiple ADCs with busy indicator
20-lead, 4 mm × 4 mm LFCSP (QFN)
APPLICATIONS
Battery-powered equipment
Communications
ATE
Data acquisition systems
Medical instruments
Table 1. MSOP, LFCSP, 14-/16-/18-Bit PulSAR® ADCs
Type
100 kSPS
14-Bit
AD7940
16-Bit
AD7680
AD7683
AD7684
18-Bit
1
See
www.analog.com
for the latest selection of PulSAR ADCs and ADC drivers.
Pin-for-pin compatible with all other parts marked with this endnote.
2
3
The AD7985 and AD7986 are pin-for-pin compatible.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
0V
TO
V
REF
NOTES
1. GND REFERS TO REFGND, AGND, AND DGND.
GENERAL DESCRIPTION
The AD7985 is a 16-bit, 2.5 MSPS successive approximation
analog-to-digital converter (SAR ADC). It contains a low power,
high speed, 16-bit sampling ADC, an internal conversion clock,
an internal reference (and buffer), error correction circuits, and
a versatile serial interface port. On the rising edge of CNV, the
AD7985 samples an analog input, IN+, between 0 V and REF
with respect to a ground sense, IN−. The AD7985 features a
very high sampling rate turbo mode (TURBO is high) and a
reduced power normal mode (TURBO is low) for low power
applications where the power is scaled with the throughput.
In normal mode (TURBO is low), the SPI-compatible serial inter-
face also features the ability, using the SDI input, to daisy-chain
several ADCs on a single 3-wire bus and provide an optional busy
indicator. It is compatible with 1.8 V, 2.5 V, and 2.7 V supplies
using the separate VIO supply.
The AD7985 is available in a 20-lead LFCSP with operation
specified from −40°C to +85°C.
1
250 kSPS
400 kSPS to 500 kSPS
AD7942
2
AD7946
2
AD7685
2
AD7686
2
AD7687
2
AD7688
2
AD7694
AD7693
2
AD7691
2
AD7690
2
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
16-Bit, 2.5 MSPS, PulSAR
15.5 mW ADC in LFCSP
AD7985
APPLICATION DIAGRAM
1.8V
TO
5V
2.5V
2.7V
BVDD
VIO
AVDD,
DVDD
TURBO
IN+
SDI
3- OR 4-WIRE
AD7985
INTERFACE:
SCK
IN–
SPI, CS,
SDO
DAISY CHAIN
CNV
(TURBO = LOW)
GND REF
10µF
Figure 1.
≥1000 kSPS
ADC Driver
AD7980
2
ADA4941-1
AD7983
2
ADA4841-x
AD7985
3
AD8021
AD7982
2
ADA4941-1
AD7984
2
ADA4841-x
AD7986
3
AD8021
www.analog.com
©2009-2010 Analog Devices, Inc. All rights reserved.
VIO

AD7985 Summary of contents

  • Page 1

    ... On the rising edge of CNV, the AD7985 samples an analog input, IN+, between 0 V and REF with respect to a ground sense, IN−. The AD7985 features a very high sampling rate turbo mode (TURBO is high) and a reduced power normal mode (TURBO is low) for low power applications where the power is scaled with the throughput ...

  • Page 2

    ... CS Mode, 3-Wire Without Busy Indicator ............................. 19 CS Mode, 3-Wire with Busy Indicator .................................... 20 CS Mode, 4-Wire Without Busy Indicator ............................. 21 CS Mode, 4-Wire with Busy Indicator .................................... 22 Chain Mode Without Busy Indicator ...................................... 23 Chain Mode with Busy Indicator ............................................. 24 Applications Information .............................................................. 25 Layout .......................................................................................... 25 Evaluating AD7985 Performance ............................................. 25 Outline Dimensions ....................................................................... 27 Ordering Guide .......................................................................... 27 Rev Page ...

  • Page 3

    ... V = 5.0 V, external 89.0 IN REF reference kHz kHz 4.096 V, internal IN REF reference kHz 4.096 V IN REF Rev Page AD7985 Typ Max Unit Bits V V REF V + 0.1 V REF +0.1 V 250 nA See the Analog Inputs section Bits ±0.50 +0.99 LSB ±0.7 +1 ...

  • Page 4

    ... AD7985 Table 3. Parameter INTERNAL REFERENCE Output Voltage Temperature Drift Line Regulation Turn-On Settling Time REFIN Output Voltage REFIN Output Resistance EXTERNAL REFERENCE Voltage Range Current Drain REFERENCE BUFFER REFIN Input Voltage Range REFIN Input Current DIGITAL INPUTS Logic Levels ...

  • Page 5

    ... VIO t t DELAY DELAY AND MAXIMUM V USED. SEE DIGITAL INPUTS IH IL Figure 3. Voltage Levels for Timing AD7985 Unit ...

  • Page 6

    ... AD7985 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Analog Inputs IN+, IN− to GND 1 Supply Voltage REF, BVDD to GND, REFGND AVDD, DVDD, VIO to GND AVDD, DVDD to VIO Digital Inputs to GND Digital Outputs to GND Storage Temperature Range Junction Temperature θ Thermal Impedance JA 20-Lead LFCSP (QFN) ...

  • Page 7

    ... TOP VIEW REFGND 4 12 SCK (Not to Scale) IN– DVDD NOTES 1. THE EXPOSED PAD IS NOT CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SYSTEM GROUND PLANE. Figure 4. Pin Configuration . REF Rev Page AD7985 ...

  • Page 8

    ... AD7985 Pin No. Mnemonic Type 1 Description 19 BVDD P Reference Buffer Power. Nominally at 5 external reference buffer is used to achieve the maximum SNR performance with reference, the reference buffer must be powered down by connecting the REFIN pin to ground. The external reference buffer must be connected to the BVDD pin. ...

  • Page 9

    ... CODE IN HEX 46,649 43,622 20,474 15,598 2947 1662 7FFC 7FFD 7FFE 7FFF 8000 8001 8002 8003 8004 8005 CODE IN HEX AD7985 65,536 ...

  • Page 10

    ... AD7985 0 –20 –40 –60 –80 –100 –120 –140 –160 –180 0 250 500 750 FREQUENCY (kHz) Figure 11. FFT Plot (External Reference) 100 95 ENOB 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 REFERENCE VOLTAGE (V) Figure 12. SNR, SINAD, and ENOB vs. Reference Voltage 100 FREQUENCY (kHz) Figure 13. SINAD vs. Frequency ...

  • Page 11

    ... Figure 20. Power-Down Current vs. Temperature Rev Page AVDD I BVDD I REF –35 – 105 TEMPERATURE (°C) Figure 19. Operating Current vs. Temperature AVDD DVDD VIO –35 – 105 TEMPERATURE (°C) AD7985 125 125 ...

  • Page 12

    ... AD7985 TERMINOLOGY Aperture Delay Aperture delay is the measure of the acquisition performance and is the time between the rising edge of the CNV input and when the input signal is held for a conversion. Differential Nonlinearity Error (DNL ideal ADC, code transitions are 1 LSB apart. DNL is the maximum deviation from this ideal value ...

  • Page 13

    ... The AD7985 provides the user with an on-chip track-and-hold and does not exhibit any pipeline delay or latency, making it ideal for multiple multiplexed channel applications. The AD7985 can be interfaced to any 1 2.7 V digital logic family available in a space-saving 20-lead LFCSP that allows flexible configurations pin-for-pin compatible with the 18-bit AD7986 ...

  • Page 14

    ... AD7985 Transfer Functions The ideal transfer characteristic for the AD7985 is shown in Figure 22 and Table 7. 111 ... 111 111 ... 110 111 ... 101 000 ... 010 000 ... 001 000 ... 000 –FSR –FSR + 1 LSB –FSR + 0.5 LSB +FSR – 1.5 LSB ANALOG INPUT Figure 22. ADC Ideal Transfer Function ...

  • Page 15

    ... AD7985. The noise from the driver is filtered by the AD7985 analog input circuit’s one-pole, low- pass filter, made by R and the external filter one is used. Because the typical noise of the AD7985 is 50 µV rms, the SNR degradation due to the amplifier is     50  ...

  • Page 16

    ... AD7985 VOLTAGE REFERENCE INPUT The AD7985 allows the choice of a very low temperature drift internal voltage reference, an external reference external buffered reference. The internal reference of the AD7985 provides excellent performance and can be used in almost all applications. Internal Reference, REF = 4.096 V (PDREF Low) To use the internal reference, the PDREF input must be low ...

  • Page 17

    ... In CS mode, the AD7985 is compatible with SPI, MICROWIRE, QSPI, and digital hosts mode, the AD7985 can use either a 3-wire or a 4-wire interface. A 3-wire interface that uses the CNV, SCK, and SDO signals minimizes wiring connections, which is useful, for example, in isolated applications ...

  • Page 18

    ... AD7985 DATA READING OPTIONS There are three different data reading options for the AD7985. There is the option to read during conversion, to split the read across acquisition and conversion (see Figure 28 and Figure 29), and, in normal mode, to read during acquisition. The desired SCK frequency largely determines which reading option to use. ...

  • Page 19

    ... CS MODE, 3-WIRE WITHOUT BUSY INDICATOR This mode is usually used when a single AD7985 is connected to an SPI-compatible digital host. The connection diagram is shown in Figure 26, and the corresponding timing is given in Figure 27. With SDI tied to VIO, a rising edge on CNV initiates a con- version, selects CS mode, and forces SDO to high impedance. ...

  • Page 20

    ... AD7985 CS MODE, 3-WIRE WITH BUSY INDICATOR This mode is usually used when a single AD7985 is connected to an SPI-compatible digital host that has an interrupt input available only in normal conversion mode (TURBO is low). The connection diagram is shown in Figure 28, and the corre- sponding timing is given in Figure 29. ...

  • Page 21

    ... CS MODE, 4-WIRE WITHOUT BUSY INDICATOR This mode is usually used when multiple AD7985 devices are connected to an SPI-compatible digital host. A connection dia- gram example using two AD7985 devices is shown in Figure 30, and the corresponding timing is given in Figure 31. With SDI high, a rising edge on CNV initiates a conversion, selects CS mode, and forces SDO to high impedance ...

  • Page 22

    ... AD7985 CS MODE, 4-WIRE WITH BUSY INDICATOR This mode is usually used when a single AD7985 is connected to an SPI-compatible digital host with an interrupt input and when it is desired to keep CNV, which is used to sample the analog input, independent of the signal used to select the data reading. This independence is particularly important in applica- tions where low jitter on CNV is desired ...

  • Page 23

    ... CHAIN MODE WITHOUT BUSY INDICATOR This mode can be used to daisy-chain multiple AD7985 devices on a 3-wire serial interface available only in normal conversion mode (TURBO is low). This feature is useful for reducing com- ponent count and wiring connections, for example, in isolated multiconverter applications or for systems with a limited inter- facing capacity ...

  • Page 24

    ... C C When all ADCs in the chain have completed their conversions, the SDO pin of the ADC closest to the digital host (see the AD7985 ADC labeled C in Figure 36) is driven high. This transition on SDO can be used as a busy indicator to trigger the data read- back controlled by the digital host ...

  • Page 25

    ... The pinout of the AD7985, with its analog signals on the left side and its digital signals on the right side, eases this task. Avoid running digital lines under the device because they couple noise onto the die, unless a ground plane under the AD7985 is used as a shield ...

  • Page 26

    ... Figure 38. Example Layout of the AD7985 (Top Layer) BVDD AVDD C BVDD REF GND GND GND GND GND GND VIO C VIO VIO Figure 39. Example Layout of the AD7985 (Bottom Layer) Rev Page AVDD PADDLE GND GND GND GND DVDD VIO C AVDD C DVDD DVDD ...

  • Page 27

    ... EVAL-AD7985EBZ EVAL-CED1Z RoHS Compliant Part. The EVAL-AD7985EBZ can be used as a standalone evaluation board or in conjunction with the EVAL-CED1Z for evaluation/demonstration purposes The EVAL-CED1Z allows control and communicate with all Analog Devices evaluation boards ending in the EB designator. 0.60 MAX 4 ...

  • Page 28

    ... AD7985 NOTES ©2009-2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07947-0-8/10(A) Rev Page ...