AD9265 Analog Devices, AD9265 Datasheet - Page 10

• Manufacturer Part Number: AD9265
• Description: 16-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9265

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 125MSPS
• Interface: LVDS,Par
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p,1 V p-p,2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

AD9265
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
Electrical
Environmental
AVDD to AGND
DRVDD to AGND
SVDD to AGND
VIN+, VIN− to AGND
CLK+, CLK− to AGND
SYNC to AGND
VREF to AGND
SENSE to AGND
VCM to AGND
RBIAS to AGND
CSB to AGND
SCLK/DFS to AGND
SDIO/DCS to AGND
OEB to AGND
PDWN to AGND
LVDS to AGND
LVDS_RS to AGND
DITHER to AGND
D0 through D15 to AGND
DCO to AGND
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
(Ambient)
Under Bias
(Ambient)
Rating
−0.3 V to +2.0 V
−0.3 V to +2.0V
−0.3 V to +3.6 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to SVDD +0.3 V
−0.3 V to SVDD +0.3 V
−0.3V to SVDD + 0.3 V
−0.3 V to DRVDD + 0.2 V
−0.3 V to DRVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to DRVDD + 0.2 V
−0.3 V to DRVDD + 0.2 V
−40°C to +85°C
150°C
−65°C to +150°C
Rev. A | Page 10 of 44
Package Type
48-Lead LFCSP
(CP-48-8)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL CHARACTERISTICS
The exposed paddle must be soldered to the ground plane for
the LFCSP package. Soldering the exposed paddle to the customer
board increases the reliability of the solder joints and maximizes
the thermal capability of the package.
Typical θ
plane. As shown, airflow improves heat dissipation, which
reduces θ
leads from metal traces, through holes, ground, and power
planes, reduces the θ
Table 7. Thermal Resistance
1
2
3
4
ESD CAUTION
Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).
Per MIL-Std 883, Method 1012.1.
Per JEDEC JESD51-8 (still air).
Per JEDEC 51-7, plus JEDEC 25-5 2S2P test board.
JA
JA
. In addition, metal in direct contact with the package
is specified for a 4-layer PCB with a solid ground
JA
Airflow
Velocity
(m/s)
0
1.0
2.5
.
θ
24.5
21.4
19.2
JA
1, 2
θ
1.3
JC
1, 3
θ
12.7
JB
1, 4
Unit
°C/W
°C/W
°C/W