AD9265 Analog Devices, AD9265 Datasheet - Page 13

• Manufacturer Part Number: AD9265
• Description: 16-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9265

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 125MSPS
• Interface: LVDS,Par
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p,1 V p-p,2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

Table 9. Pin Function Descriptions (Interleaved Parallel LVDS Mode)
Pin No.
ADC Power Supplies
13, 20, 29
4, 5, 34, 36, 45
33
39, 40
0
ADC Analog
42
43
38
37
47
46
2
3
Digital Input
1
Digital Outputs
10
9
12
11
15
14
17
16
19
18
Mnemonic
DRVDD
AVDD
SVDD
DNC
AGND
VIN+
VIN−
VREF
SENSE
RBIAS
VCM
CLK+
CLK−
SYNC
D0/1+
D0/1−
D2/3+
D2/3−
D4/5+
D4/5−
D6/7+
D6/7−
D8/9+
D8/9−
Type
Supply
Supply
Supply
Ground
Input
Input
Input/output
Input
Input/output
Output
Input
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
NOTES
1. DNC = DO NOT CONNECT.
2. THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE PACKAGE
Figure 5. LFCSP Interleaved Parallel LVDS Pin Configuration (Top View)
PROVIDES THE ANALOG GROUND FOR THE PART. THIS EXPOSED PAD
MUST BE CONNECTED TO GROUND FOR PROPER OPERATION.
AVDD
AVDD
DCO+
SYNC
DCO–
D0/1+
D2/3+
CLK+
CLK–
D0/1–
D2/3–
OEB
10
11
12
1
2
3
4
5
6
7
8
9
Digital Output Driver Supply (1.8 V Nominal).
SPI Input/Output Voltage.
Voltage Reference Input/Output.
Voltage Reference Mode Select. See Table 11 for details.
Common-Mode Level Bias Output for Analog Inputs.
ADC Clock Input—True.
Digital Synchronization Pin. Slave mode only.
LVDS Output Data Bit 0/Bit 1 (LSB)—Complement.
LVDS Output Data Bit 2/Bit 3—True.
LVDS Output Data Bit 4/Bit 5—True.
LVDS Output Data Bit 6/Bit 7—True.
LVDS Output Data Bit 8/Bit 9 —True.
Description
Analog Power Supply (1.8 V Nominal).
Do Not Connect.
Analog Ground. The exposed thermal pad on the bottom of the package provides the
analog ground for the input. This exposed pad must be connected to ground for proper
operation.
Differential Analog Input Pin (+).
Differential Analog Input Pin (−).
External Reference Bias Resistor.
ADC Clock Input—Complement.
LVDS Output Data Bit 0/Bit 1 (LSB)—True.
LVDS Output Data Bit 2/Bit 3—Complement.
LVDS Output Data Bit 4/Bit 5—Complement.
LVDS Output Data Bit 6/Bit 7—Complement.
LVDS Output Data Bit 8/Bit 9—Complement.
PIN 1
INDICATOR
Rev. A | Page 13 of 44
INTERLEAVED
(Not to Scale)
AD9265
TOP VIEW
LVDS
36
35
34
33
32
31
30
29
28
27
26
25
AVDD
DITHER
AVDD
SVDD
CSB
SCLK/DFS
SDIO/DCS
DRVDD
OR+
OR–
D14/15+
D14/15–
AD9265