AD9265 Analog Devices, AD9265 Datasheet - Page 28

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AD9265

Manufacturer Part Number
AD9265
Description
16-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9265

Resolution (bits)
16bit
# Chan
1
Sample Rate
125MSPS
Interface
LVDS,Par
Analog Input Type
Diff-Uni
Ain Range
(2Vref) p-p,1 V p-p,2 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP

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AD9265
VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD9265.
The input range can be adjusted by varying the reference voltage
applied to the AD9265, using either the internal reference or an
externally applied reference voltage. The input span of the ADC
tracks reference voltage changes linearly. The various reference
modes are summarized in the sections that follow. The Reference
Decoupling section describes the best practices PCB layout of
the reference.
Internal Reference Connection
A comparator within the AD9265 detects the potential at the
SENSE pin and configures the reference into four possible modes,
which are summarized in Table 11. If SENSE is grounded, the
reference amplifier switch is connected to the internal resistor
divider (see Figure 70), setting VREF to 1.0 V for a 2.0 V p-p full-
scale input. In this mode, with SENSE grounded, the full scale can
also be adjusted through the SPI port by adjusting Bit 6 and Bit 7 of
Register 0x18. These bits can be used to change the full scale to
1.25 V p-p, 1.5 V p-p, 1.75 V p-p, or to the default of 2.0 V p-p,
as shown in Table 17.
Connecting the SENSE pin to the VREF pin switches the reference
amplifier output to the SENSE pin, completing the loop and pro-
viding a 0.5 V reference output for a 1 V p-p full-scale input.
If a resistor divider is connected external to the chip, as shown
in Figure 71, the switch again sets to the SENSE pin. This puts
Table 11. Reference Configuration Summary
Selected Mode
External Reference
Internal Fixed Reference
Programmable Reference
Internal Fixed Reference
1.0µF
Figure 70. Internal Reference Configuration
0.1µF
SENSE
VREF
VIN+
VIN–
SELECT
LOGIC
SENSE Voltage
AVDD
VREF
0.2 V to VREF
AGND to 0.2 V
0.5V
ADC
CORE
ADC
Resulting VREF (V)
N/A
0.5
1.0
0.5
Rev. A | Page 28 of 44
1
R2
R1
(see Figure 71)
the reference amplifier in a noninverting mode with the VREF
output defined as follows:
The input range of the ADC always equals twice the voltage at
the reference pin for either an internal or an external reference.
If the internal reference of the AD9265 is used to drive multiple
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 72 shows
how the internal reference voltage is affected by loading.
VREF
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
1.0µF
0
0.2
Figure 71. Programmable Reference Configuration
0
0.4
0.1µF
5 .
VREF
Figure 72. VREF Accuracy vs. Load
 
0.6
1
Resulting Differential Span (V p-p)
2 × external reference
2 × VREF
1.0
2.0
R2
R1
SENSE
R2
R1
0.8
LOAD CURRENT (mA)
VIN+
VIN–
1.0
1.2
VREF = 1V
SELECT
LOGIC
1.4
VREF = 0.5V
ADC
0.5V
1.6
CORE
ADC
1.8
2.0

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