AD7193 Analog Devices, AD7193 Datasheet - Page 2

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AD7193

Manufacturer Part Number
AD7193
Description
4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
Manufacturer
Analog Devices
Datasheet

Specifications of AD7193

Resolution (bits)
24bit
# Chan
4
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Uni,SE-Uni,Usr-Defined Range/Offset
Ain Range
± (Vref/Gain)
Adc Architecture
Sigma-Delta
Pkg Type
SOP

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AD7193
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications ..................................................................................... 4
Absolute Maximum Ratings .......................................................... 10
Pin Configurations and Function Descriptions ......................... 11
Typical Performance Characteristics ........................................... 15
RMS Noise and Resolution............................................................ 18
On-Chip Registers .......................................................................... 21
ADC Circuit Information .............................................................. 31
Timing Characteristics ................................................................ 8
Thermal Resistance .................................................................... 10
ESD Caution ................................................................................ 10
Sinc
Sinc
Fast Settling ................................................................................. 20
Communications Register ......................................................... 22
Status Register ............................................................................. 23
Mode Register ............................................................................. 24
Configuration Register .............................................................. 27
Data Register ............................................................................... 29
ID Register ................................................................................... 29
GPOCON Register ..................................................................... 29
Offset Register ............................................................................. 30
Full-Scale Register ...................................................................... 30
Overview ...................................................................................... 31
Analog Input Channel ............................................................... 32
Programmable Gain Array (PGA) ........................................... 32
4
3
Chop Disabled ................................................................... 18
Chop Disabled ................................................................... 19
Rev. C | Page 2 of 56
Digital Filter .................................................................................... 41
Grounding and Layout .................................................................. 53
Applications Information .............................................................. 54
Outline Dimensions ....................................................................... 55
Reference ..................................................................................... 32
Reference Detect ......................................................................... 33
Bipolar/Unipolar Configuration .............................................. 33
Data Output Coding .................................................................. 33
Burnout Currents ....................................................................... 33
Channel Sequencer .................................................................... 33
Digital Interface .......................................................................... 34
Reset ............................................................................................. 38
System Synchronization ............................................................ 38
Enable Parity ............................................................................... 38
Clock ............................................................................................ 38
Bridge Power-Down Switch ...................................................... 38
Temperature Sensor ................................................................... 39
Logic Outputs ............................................................................. 39
Calibration................................................................................... 39
Sinc
Sinc
Chop Enabled (Sinc
Chop Enabled (Sinc
Fast Settling Mode (Sinc
Fast Settling Mode (Sinc
Fast Settling Mode (Chop Enabled) ......................................... 51
Summary of Filter Options ....................................................... 52
Flowmeter .................................................................................... 54
Ordering Guide .......................................................................... 55
4
3
Filter (Chop Disabled) ..................................................... 41
Filter (Chop Disabled) ..................................................... 43
4
3
Filter) ...................................................... 45
Filter) ...................................................... 47
4
3
Filter) ............................................... 48
Filter) ............................................... 50
Data Sheet

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