AD7986 Analog Devices, AD7986 Datasheet
AD7986
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AD7986 Summary of contents
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... ADCs on a single 3-wire bus and provide an optional busy indicator compatible with 1.8 V, 2.5 V, and 2.7 V using the separate VIO supply. The AD7986 is available in a 20-lead LFCSP (QFN) with operation specified from −40°C to +85°C. 250 kSPS 400 kSPS to 500 kSPS ...
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... CS Mode, 3-Wire with Busy Indicator .................................... 20 CS Mode, 4-Wire Without Busy Indicator ............................. 21 CS Mode, 4-Wire with Busy Indicator .................................... 22 Chain Mode Without Busy Indicator ...................................... 23 Chain Mode with Busy Indicator ............................................. 24 Application Hints ........................................................................... 25 Layout .......................................................................................... 25 Evaluating the AD7986 Performance ...................................... 25 Outline Dimensions ....................................................................... 27 Ordering Guide .......................................................................... 27 Rev Page ...
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... V × 0.525 REF REF 100 250 See the Analog Inputs section ±0.60 +1.50 ±1.00 +2.50 2.0 ±2.4 +20 ±0.5 +0.8 ±0.3 ±4 2.00 100 96.5 98 95.5 97.0 −115 −113 −114 95.5 19 0.7 AD7986 Unit Bits Bits 2 LSB 2 LSB 2 LSB LSB 2 ppm/°C mV ppm/°C LSB 2 MSPS ...
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... AD7986 AVDD = DVDD = 2.5 V, BVDD = 5 V, VIO = 1 2 Table 3. Parameter Conditions INTERNAL REFERENCE PDREF = low Output Voltage T = 25°C A Temperature Drift −40°C to +85°C Line Regulation AVDD = 2.5 V ± 5% Turn-On Settling Time C REF REFIN Output Voltage REFIN @ 25°C REFIN Output Resistance ...
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... SSDISCK t 3 HSDISCK t 5 DSDOSDI 10% VIO t t DELAY DELAY AND MAXIMUM V USED. SEE DIGITAL INPUTS IH IL Figure 3. Voltage Levels for Timing AD7986 Unit ...
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... AD7986 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Analog Inputs 1 IN+, IN− to GND Supply Voltage REF, BVDD to GND, REFGND AVDD, DVDD, VIO to GND AVDD and DVDD to VIO Digital Inputs to GND Digital Outputs to GND Storage Temperature Range Junction Temperature θ Thermal Impedance JA 20-Lead LFCSP (QFN) ...
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... REFGND 3 TOP VIEW REFGND 4 12 SCK (Not to Scale) IN– DVDD NOTES 1. THE EXPOSED PAD IS NOT CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SYSTEM GROUND PLANE. Figure 4. Pin Configuration Rev Page AD7986 ...
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... AD7986 1 Pin No. Mnemonic Type Description 16 AVDD P Input Analog Power. Nominally at 2.5 V. 17,18 AGND P Analog Power Ground. 19 BVDD P Reference buffer power. Nominally 5 external reference buffer is used to achieve the maximum SNR performance with 5 V reference, the reference buffer must be powered down by connecting the REFIN pin to ground. The external reference buffer must be connected to the BVDD pin ...
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... CODE IN HEX 40,000 37,385 36,210 35,000 30,000 25,000 22,077 18,953 20,000 15,000 10,000 6879 6513 5000 1282 3 150 3FFEB 3FFED 3FFEF 3FF1 3FF3 3FF5 CODE IN HEX AD7986 262,144 3FFF 1 1438 165 16 0 3FF7 3FF9 ...
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... AD7986 0 –20 –40 –60 –80 –100 –120 –140 –160 –180 –200 0 200k 400k 600k FREQUENCY (Hz) Figure 11. FFT Plot (External Reference) 100 SNR 95 SINAD ENOB 2.5 3.0 3.5 4.0 REFERENCE VOLTAGE (V) Figure 12. SNR, SINAD, and ENOB vs. Reference Voltage 100 10k FREQUENCY (Hz) Figure 13. SINAD vs. Frequency ...
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... Rev Page REF I AVDD I BVDD –35 – 105 TEMPERATURE (C) Figure 19. Operating Currents vs. Temperature AVDD DVDD VIO –35 – 105 TEMPERATURE (°C) Figure 20. Power-Down Currents vs. Temperature AD7986 125 125 ...
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... AD7986 TERMINOLOGY Integral Nonlinearity Error (INL) INL refers to the deviation of each individual code from a line drawn from negative full scale through positive full scale. The point used as negative full scale occurs ½ LSB before the first code transition. Positive full scale is defined as a level 1½ LSB beyond the last code transition ...
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... The AD7986 provides the user with an on-chip track-and-hold and does not exhibit any pipeline delay or latency, making it ideal for multiple multiplexed channel applications. The AD7986 can be interfaced to any 1 2.7 V digital logic family available in a 20-lead LFCSP (QFN) that allows space savings and flexible configurations. ...
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... AD7986 Transfer Functions The ideal transfer characteristic for the AD7986 is shown in Figure 22 and Table 7. 011 ... 111 011 ... 110 011 ... 101 100 ... 010 100 ... 001 100 ... 000 –FSR –FSR + 1 LSB –FSR + 0.5 LSB +FSR – 1.5 LSB ANALOG INPUT Figure 22. ADC Ideal Transfer Function ...
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... AD7986. The noise from the driver is filtered by the AD7986 analog input circuit’s one-pole, low- pass filter, made by R and the external filter one is used. Because the typical noise of the AD7986 is 62.5 µV rms, the SNR degradation due to the amplifier is 62.5 = ...
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... AD7986 VOLTAGE REFERENCE INPUT The AD7986 allows the choice of a very low temperature drift internal voltage reference, an external reference external buffered reference. The internal reference of the AD7986 provides excellent performance and can be used in almost all applications. Internal Reference, REF = 4.096V (PDREF = Low) To use the internal reference, the PDREF input must be low ...
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... When in CS mode, the AD7986 is compatible with SPI, MICROWIRE™, QSPI™, and digital hosts. In this mode, the AD7986 can use either a 3-wire or a 4-wire interface. A 3-wire interface using the CNV, SCK, and SDO signals minimizes wiring connections, which is useful, for instance, in isolated applications ...
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... AD7986 DATA READING OPTIONS There are three different data reading options for the AD7986. There is the option to read during conversion, to split the read across acquisition and conversion (see Figure 27 and Figure 28), and in normal mode, to read during acquisition. The desired SCK frequency largely determines which reading option to pursue ...
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... CS MODE, 3-WIRE WITHOUT BUSY INDICATOR This mode is usually used when a single AD7986 is connected to an SPI-compatible digital host. The connection diagram is shown in Figure 25, and the corresponding timing is given in Figure 26. With SDI tied to VIO, a rising edge on CNV initiates a conversion, selects the CS mode, and forces SDO to high impedance. Once a conversion is initiated, it continues until completion irrespective of the state of CNV ...
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... AD7986 CS MODE, 3-WIRE WITH BUSY INDICATOR This mode is usually used when a single AD7986 is connected to an SPI-compatible digital host having an interrupt input only available in normal conversion mode (TURBO = low). The connection diagram is shown in Figure 27, and the corresponding timing is given in Figure 28. ...
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... CS MODE, 4-WIRE WITHOUT BUSY INDICATOR This mode is usually used when multiple AD7986 devices are connected to an SPI-compatible digital host. A connection diagram example using two AD7986 devices is shown in Figure 29, and the corresponding timing is given in Figure 30. With SDI high, a rising edge on CNV initiates a conversion, selects the CS mode, and forces SDO to high impedance ...
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... AD7986 CS MODE, 4-WIRE WITH BUSY INDICATOR This mode is usually used when a single AD7986 is connected to an SPI-compatible digital host with an interrupt input and when it is desired to keep CNV, which is used to sample the analog input, independent of the signal used to select the data reading. This independence is particularly important in applications where low jitter on CNV is desired ...
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... CHAIN MODE WITHOUT BUSY INDICATOR This mode can be used to daisy-chain multiple AD7986 devices on a 3-wire serial interface only available in normal conver- sion mode (TURBO = low). This feature is useful for reducing component count and wiring connections, for example, in isolated multiconverter applications or for systems with a limited interfacing capacity ...
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... When all ADCs in the chain have completed their conversions, the SDO pin of the ADC closest to the digital host (see the AD7986 ADC labeled C in Figure 35) is driven high. This transition on SDO can be used as a busy indicator to trigger the data readback controlled by the digital host. The AD7986 then enters the acquisition phase and powers down ...
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... Avoid running digital lines under the device because these couple noise onto the die, unless a ground plane under the AD7986 is used as a shield. Fast switching signals, such as CNV or clocks, should not run near analog signal paths. Crossover of digital and analog signals should be avoided ...
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... GND GND Figure 37. Example Layout of the AD7986 (Top Layer) BVDD AVDD CBVDD REF GND GND GND GND GND GND VIO CVIO VIO Figure 38. Example Layout of the AD7986 (Bottom Layer) Rev Page AVDD GND GND DVDD VIO CAVDD CDVDD DVDD ...
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... EVAL-AD7986EBZ EVAL-CED1Z RoHS Compliant Part. 2 The EVAL-AD7986EBZ can be used as a standalone evaluation board or in conjunction with the EVAL-CED1Z for evaluation/demonstration purposes. 3 The EVAL-CED1Z allows control and communicate with all Analog Devices evaluation boards ending in the EB designator. 0.60 MAX 4.00 BSC SQ ...
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... AD7986 NOTES ©2009–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07956-0-3/11(B) Rev Page ...