AD7294 Analog Devices, AD7294 Datasheet
AD7294
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AD7294 Summary of contents
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... One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 AD7294 contains all the functions required for general- AD7294 is a highly integrated solution that offers all the www.analog.com ©2008–2012 Analog Devices, Inc. All rights reserved. also ...
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... AD7294 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 3 Functional Block Diagram .............................................................. 4 Specifications ..................................................................................... 5 DAC Specifications....................................................................... 5 ADC Specifications ...................................................................... 6 General Specifications ................................................................. 8 Timing Characteristics ................................................................ 9 Absolute Maximum Ratings .......................................................... 10 Thermal Resistance .................................................................... 10 ESD Caution ................................................................................ 10 Pin Configuration and Function Descriptions ........................... 11 Typical Performance Characteristics ........................................... 14 Terminology .................................................................................... 19 DAC Terminology ...................................................................... 19 ADC Terminology ...................................................................... 19 Theory of Operation ...
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... Rev. A Changes to Configuration Register (0x09) Section .................... 29 Changes to Table 23 and Table 24 ................................................. 29 Changes to Table 27 ........................................................................ 30 Changes to Autocycle Mode Section ............................................ 38 Change to Alert Status Registers Section ..................................... 39 Changes to DATA and DATA HIGH Section .............................................................................................. 39 1/08—Revision 0: Initial Version Rev Page AD7294 Monitoring Features LOW ...
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... SENSE OVERRANGE V 10. SENSE OVERRANGE D1+ D2 D2– D1– AD7294 SENSE TO LOAD REF / OUT RS1(+) RS1(–) RS2(+) RS2(–) REF ADC IN HIGH SIDE HIGH SIDE CURRENT CURRENT SENSE SENSE REF 12-BIT MUX ADC ...
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... Rev Page 2 5 =−40°C to +105°C, unless A = −40°C to +105° 25° giving an output × V REF = 3 V − 2 × OFFSET REF DAC , and 200 kΩ to AGND, see Figure 48 REF = 2.5 V AD7294 REF ...
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... AD7294 ADC SPECIFICATIONS 4 5.5 V, AGND = DGND = −40°C to +105°C, unless otherwise noted. A Table 2. Parameter DC ACCURACY Resolution 1 Integral Nonlinearity (INL) 1 Differential Nonlinearity (DNL) Single-Ended Mode Offset Error Offset Error Match Gain Error Gain Error Match Differential Mode ...
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... DD ±2 μA 25 Ω ppm/°C , see Figure 40. IN− Rev Page AD7294 Test Conditions/Comments Internal temperature sensor −30°C to +90°C A Internal temperature sensor −40°C to +105°C A LSB size External transistor is 2N3906 Limited by external diode −40°C to +105°C ...
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... AD7294 GENERAL SPECIFICATIONS 4 5.5 V, AGND = DGND = DAC OUTV+ AB and DAC OUTV 4 16.5 V; OFFSET floating, therefore, DAC output span = −40°C to +105°C, unless otherwise noted. A Table 3. Parameter LOGIC INPUTS Input High Voltage ...
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... C-Compatible Serial Interface Timing Diagram 200µ OUTPUT PIN C L 50pF I 200µA OH Figure 3. Load Circuit for Digital Output Rev Page 2 5 DRIVE REPEATED START CONDITION CONDITION V (MIN (MAX) OL AD7294 to 59 STOP ...
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... AD7294 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted Table 5. Parameter Rating AGND −0 + AGND −0 DAC OUTV AGND −0 +17 V DAC OUTV AGND −0 + DGND −0 ...
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... I 2 OVERRANGE 45 SENSE DGND V 42 DRIVE OPGND 41 SCL 40 SDA 39 38 AS0 AS1 37 36 AS2 ALERT/BUSY 35 AGND5 DGND I 1 OVERRANGE 41 SENSE I 2 OVERRANGE 40 SENSE DGND V 37 DRIVE 36 OPGND 35 SCL 34 SDA 33 AS0 32 AS1 31 AS2 30 ALERT/BUSY 29 AGND5 AD7294 ...
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... Analog Supply Pins. The operating range is 4 5.5 V. These pins provide DD DD for TQFP the supply voltage for all the analog circuitry on the AD7294. Connect the for AV and DV pins together to ensure that all supply pins are at the same ...
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... Digital Ground. This pin is the ground for all digital circuitry. DV Logic Power Supply. The operating range is 4 5.5 V. These pins provide DD the supply voltage for all the digital circuitry on the AD7294. Connect the AV and DV pins together to ensure that all supply pins are at the same potential. DD Decouple this supply to DGND with a10 µ ...
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... AD7294 TYPICAL PERFORMANCE CHARACTERISTICS 20 8192 POINT FFT 5V, V RANGE DRIVE REF F = 22.22kSPS SAMPLE F = 10kHz 400kHz IN SCLK –20 SINGLE ENDED SNR = 71dB, THD = –82dB –40 –60 –80 –100 –120 0 2000 4000 6000 FREQUENCY (kHz) Figure 6. Signal-to-Noise Ratio Single-Ended, V ...
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... DD 0.6 DIFFERENTIAL 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 256 768 1280 1792 2304 2816 0 512 1024 1536 2048 2560 3072 CODE Figure 17. ADC DNL Differential, 2 × V REF AD7294 3328 3840 3584 4096 3328 3840 3584 4096 Range 3328 3840 3584 4096 Range ...
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... AD7294 1.5 1.0 MAX INL 0 DRIVE –0 SINGLE-ENDED MODE 400kHz –1.0 –1.5 MIN INL –2.0 –2 REFERENCE VOLTAGE (V) Figure 18. ADC INL vs. Reference Voltage 0.8 0.6 MAX DNL 0 DRIVE SINGLE-ENDED MODE 400kHz –0.2 MIN DNL –0.4 –0.6 ...
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... TIME (Seconds) AD7294 to Thermal Shock Using 2N3906 (2N3906 Placed in a Stirred Oil Bath) 55 EXTERNAL 50 45 INTERNAL AD7294 IN SOCKET ON 200mm × 100mm 2-LAYER FR-4 PCB 25 – TIME (Seconds) AD7294 and the 2N3906 are Placed in a Stirred Oil Bath) ...
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... FREQUENCY (Hz) Figure 32. Frequency Response of the High-Side Current Sensor on the AD7294 2.0 2.5 Figure 33. I 8000 10000 12000 Figure 34. I 10M 100M Rev Page –50 –55 –60 –65 –70 –75 –80 – ...
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... Zero code error is a measure of the output error when zero code (0x0000) is loaded to the DAC register. Ideally, the output should The zero code error is always positive in the AD7294 because the output of the DAC cannot go below 0 V. Zero code error is expressed in mV. Full-Scale Error Full-scale error is a measure of the output error when full-scale code (0xFFFF) is loaded to the DAC register ...
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... D IN ANALOG INPUTS V – 1LSB REF The AD7294 the configuration register setup, they can be configured as two single-ended inputs, two pseudo differential channels, or two fully differential channels. See the Register Setting section for further details. /4096 when the 0 V REF ...
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... Using an Op Amp Pair An op amp pair can be used to directly couple a differential signal V IN+ to one of the analog input pairs of the AD7294. The circuit con- 1 AD7294 figurations illustrated in Figure 39 show how a dual op amp can V IN– ...
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... DRIVE flowing through the external shunt resistor produces a voltage at the input terminals of the AD7294. Resistors R1 and R2 connect the input terminals to the differential amplifier (A1). A1 nulls the voltage appearing across its own input terminals by adjusting the current through R1 and R2 with Transistor Q1 and Transistor Q2. Common-mode feedback maintains the sum of these currents at approximately 50 μ ...
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... AD7294, SENSE the analog inputs to the amplifiers are then swapped, and the differential voltage is once again converted by the AD7294. The two conversion results enable the digital removal of any offset or noise. Switches on the amplifier inputs enable this chopping technique to be implemented. This process requires 6 μ ...
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... OVERRANGE pin is set to a high logic level enabling SENSE appropriate action to be taken to prevent any damage to the external circuitry. The setpoint threshold level is fixed internally in the AD7294, and the current sense amplifier saturates above this level. The comparator also triggers if a voltage of less than AV to the pin ...
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... Decouple both the REF REF DAC pin and the REF IN 220 nF capacitor. On power-up, the AD7294 is configured for use with an external reference. To enable the internal references, write a zero to both the D4 and D5 bits in the power-down register (see the Register Setting section for more details). Both the ADC and DAC references require a minimum of 60 μ ...
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... DRIVE 2 C interface operates. The V pin is connected to DRIVE 2 C bus is pulled. This pin sets the input feature allows the DRIVE is operated with the V DD DRIVE AD7294 input range with yet remains REF DD AD7294 pin can can be ...
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... Rev Page AD7294 Registers (R is Read/W is Write) Command Register (W) Result Register (R)/DAC Value ( Result (R)/DAC Value (W) SENSE Result (R)/DAC Value (W) SENSE C T INT Result (R)/DAC Value (W) SENSE D ...
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... SENSE SENSE (DIFF) D12 D11 CH B11 ID1 ID0 Rev Page Data Sheet AD7294 results register; Table (S.E (S.E (S.E − − − (DIFF) ...
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... ID2 ID1 ID0 INT RESULT REGISTER (0x04) INT register is a 16-bit read-only register used to SENSE 1 and T 2 result registers, this SENSE SENSE +0.5 AD7294 LSB D10 D9 D8 B10 B9 B8 LSB (LSB) +0.25 ...
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... AD7294 DAC , DAC , DAC , DAC , REGISTERS (0x01 TO 0x04 Writing to these register addresses sets the DAC and DAC output voltage codes, respectively. Bits[D11:D0 the write result register are the data bits sent to DAC to Bit D12 are ignored. Table 17. DAC Register (First Write) ...
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... Data Sheet CONFIGURATION REGISTER (0x09) The configuration register is a 16-bit read/write register that sets the operating modes of the AD7294. The bit functions of the configuration register are outlined in Table 23 and Table 24. On power-up, the configuration register is reset to 0x0000. Sample Delay and Bit Trial Delay ...
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... Bit D7 = 1), this ROM is switched off and the slave address MSBs become 00. Therefore, to exit the full-power-down state necessary to write to the AD7294 using this modified slave address. After writing 0 to power down Bit D7, the slave address MSBs return to their original 11 value ...
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... Table 33 SENSE Input result register. Value (°C) Rev Page results are SENSE Offset Data Format SENSE MSB −32 + AD7294 LSB D1 D0 +0.5 +0.25 ...
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... ACK. BY AD7294 2 Figure 50. General I C Timing Rev Page Data Sheet 2 C bus in its idle state (no AD7294 as the slave device. In this example, the register pointer is being set up ready for a future read ACK. BY STOP BY REGISTER ADDRESS AD7294 MASTER ...
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... The addressed slave device asserts an acknowledge on SDA. 4. The master sends a register address. 5. The slave asserts an acknowledge on SDA. 6. The master sends a data byte. 7. The slave asserts an acknowledge on SDA. 8. The master asserts a stop condition to end the transaction. Rev Page AD7294 2 uses the following I C protocols. ...
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... FROM MASTER TO SLAVE S = START CONDITION SR = REPEATED START P = STOP CONDITION FROM SLAVE TO MASTER A = ACKNOWLEDGE A = NOT ACKNOWLEDGE Figure 51. Single Byte Write Sequence Rev Page Data Sheet ACK. BY AD7294 FRAME ACK. BY STOP BY AD7294 MASTER FRAME 3 DATA BYTE A DATA A P ...
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... The master device asserts a start condition on SDA. 2. The master sends the 7-bit slave address followed by the write bit (low). 3. The addressed slave device (AD7294) asserts an acknowledge on SDA. 4. The master sends a register address, for example the Alert Status Register A register address. The slave asserts an acknowledge on SDA ...
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... AD7294 Reading Data from an 8-Bit Register Reading the contents from any of the 8-bit registers is a single byte read operation, as shown in Figure 55. In this protocol, the first part of the transaction writes to the register pointer. When the register address has been set up, any number of reads can be performed from that particular register without having to write to the address pointer register again ...
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... The master sends the 7-bit slave address followed by the write bit (high). 9. The slave (AD7294) asserts an acknowledge on SDA. transmitting, 10. The master receives a data byte, which contains the alert_flag bit, the channel ID bits, and the four MSBs of the converted result for Channel V an acknowledge on SDA ...
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... AD7294 AUTOCYCLE MODE The AD7294 can be configured to convert continuously on a programmable sequence of channels making it the ideal mode of operation for system monitoring. These conversions take place in the background approximately every 50 µs, and are transparent to the master. Typically, this mode is used to automatically monitor a selection of channels with either the ...
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... DATA limits. HIGH LOW AND DATA MONITORING FEATURES LOW signals an alert (in either hardware via the register stores the upper limit that activates the HIGH register, an alert occurs. The DATA HIGH or DATA HIGH AD7294 /10.41. REF 2, and SENSE register LOW register, LOW LOW ...
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... N is taken from the 12-bit hysteresis register associated with that channel. By setting the hysteresis register to a code close to the maximum output code for the ADC, that is, 0x77D, DATA or DATA alerts do not clear automatically by the AD7294. LOW Bit D11 of the T DATA or DATA ...
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... The circuit in Figure typical system connection diagram for the AD7294. The device monitors and controls the overall performance of two final stage amplifiers. The gain control and phase adjustment of the driver stage are incorporated in the application and are carried out by the two available uncommitted outputs of the AD7294 ...
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... AMPLIFIER RF IN ATTENUATOR C7 C5 AD8362 0.1nF 1nF T2 INHI VOUT 1:4 INLO VSET C6 0.1nF C LPF Figure 60. Setpoint Controller Operation Rev Page Data Sheet AD8362 accordingly. AD8362 is applied to the gain control terminal of feeds the control input of the other. OUT AD7294 OUT AD8362 ...
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... Take the following precautions: • Place the remote sensing diode as close as possible to AD7294 is the AD7294. If the worst noise sources are avoided, this should have separate distance can be 4 inches to 8 inches. • Route the D+ and D− tracks close together, in parallel, with grounded guard tracks on each side. Provide a ground plane under the tracks, if possible ...
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... AD7294 OUTLINE DIMENSIONS 1.05 1.00 0.95 0.15 SEATING 0.05 PLANE VIEW A ROTATED 90° CCW 8.00 BSC SQ PIN 1 INDICATOR TOP VIEW 1.00 12° MAX 0.85 0.80 SEATING PLANE 1.20 0.75 MAX 0.60 0. 0° MIN 0.20 0.09 7° 3.5° 16 0° 17 0.08 MAX COPLANARITY VIEW A LEAD PITCH COMPLIANT TO JEDEC STANDARDS MS-026-ABD Figure 62. 64-Lead Thin Plastic Quad Flat Package [TQFP] ...
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... AD7294BSUZRL −40°C to +105°C AD7294BCPZ −40°C to +105°C AD7294BCPZRL −40°C to +105°C EVAL-AD7294EBZ RoHS Compliant Part. Package Description 64-Lead Thin Plastic Quad Flat Package [TQFP] 64-Lead Thin Plastic Quad Flat Package [TQFP] 56-Lead Lead Frame Chip Scale Package [LFCSP_VQ] ...
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... AD7294 NOTES refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05747-0-1/12(H) Rev Page Data Sheet ...