AD7984 Analog Devices, AD7984 Datasheet
AD7984
Specifications of AD7984
Available stocks
Related parts for AD7984
AD7984 Summary of contents
Page 1
... SDI input, to daisy-chain several ADCs on a single 3-wire bus and provides an optional busy indicator compatible with 1 and 5 V logic, using the separate VIO supply. The AD7984 is available in a 10-lead MSOP or a 10-lead QFN (LFCSP) with operation specified from −40°C to +85°C. 250 kSPS ...
Page 2
... CS Mode, 3-Wire with Busy Indicator .................................... 18 CS Mode, 4-Wire Without Busy Indicator ............................. 19 CS Mode, 4-Wire with Busy Indicator .................................... 20 Chain Mode Without Busy Indicator ...................................... 21 Chain Mode with Busy Indicator ............................................. 22 Application Hints ........................................................................... 23 Layout .......................................................................................... 23 Evaluating the AD7984 Performance ...................................... 23 Outline Dimensions ....................................................................... 24 Ordering Guide .......................................................................... 24 Rev Page ...
Page 3
... V × 0.5 V × 0.525 REF REF 67 200 See the Analog Inputs section +1.5 +2.25 0.95 ±0.022 +0.075 −0.6 ±100 +700 0.3 90 1.33 290 99.7 98.5 112.5 −110.5 98 AD7984 Unit Bits Bits 2 LSB 2 LSB 2 LSB % of FS ppm/°C μV ppm/° MSPS ...
Page 4
... AD7984 VDD = 2.5 V, VIO = 2 5.5 V, REF = Table 3. Parameter Conditions REFERENCE Voltage Range Load Current 1.33 MSPS SAMPLING DYNAMICS −3 dB Input Bandwidth Aperture Delay DIGITAL INPUTS Logic Levels V VIO > VIO > VIO ≤ VIO ≤ ...
Page 5
... HSDISCK t 15 DSDOSDI 1 Y% VIO 1 t DELAY AND MAXIMUM V USED. SEE DIGITAL INPUTS IH IL Figure 3. Voltage Levels for Timing AD7984 Unit ...
Page 6
... AD7984 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Analog Inputs 1 IN+, IN− to GND Supply Voltage REF, VIO to GND VDD to GND VDD to VIO Digital Inputs to GND Digital Outputs to GND Storage Temperature Range Junction Temperature θ Thermal Impedance JA 10-Lead MSOP 10-Lead QFN (LFCSP) θ Thermal Impedance ...
Page 7
... AI = analog input digital input digital output, and P = power. VIO SDI SCK SDO CNV Rev Page VIO REF VDD 2 9 SDI AD7984 SCK IN (EXPOSED PAD)* IN– SDO GND CNV 5 6 *EXPOSED PADDLE CAN BE CONNECTED TO GROUND. Figure 5. 10-Lead QFN (LFCSP) Pin Configuration AD7984 ...
Page 8
... AD7984 TYPICAL PERFORMANCE CHARACTERISTICS VDD = 2.5 V, REF = 5.0 V, VIO = 3.3 V. 2.0 POSITIVE INL: +1.07LSB NEGATIVE INL: –0.73LSB 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 65536 131072 CODE Figure 6. Integral Nonlinearity vs. Code 60k 55354 50k 40k 32350 31003 30k 20k 10k 5992 326 ...
Page 9
... Rev Page AD7984 3.0 3.5 4.0 4.5 5.0 REFERENCE VOLTAGE (V) Figure 15. THD vs. Reference Voltage –35 – 105 TEMPERATURE (°C) Figure 16. THD vs. Temperature 1 10 100 FREQUENCY (kHz) Figure 17 ...
Page 10
... AD7984 2.5 I VDD 2.0 1.5 1.0 I REF 0.5 I VIO 0 2.375 2.425 2.475 2.525 V VOLTAGE (V) DD Figure 18. Operating Currents vs. Supply 1.5 1.4 1.3 1 VDD VIO 1.1 1.0 0.9 0.8 0.7 0.6 0.5 –55 –35 – TEMPERATURE (°C) Figure 19. Standby Currents vs. Temperature 2.575 2.625 65 85 105 125 Rev Page 2.5 I VDD 2.0 1.5 1.0 I REF 0.5 I VIO 0 –55 –35 – ...
Page 11
... CNV input and when the input signal is held for a conversion. Transient Response Transient response is the time required for the ADC to accurately acquire its input after a full-scale step function is applied. Rev Page AD7984 N (2 /Peak-to-Peak Noise ...
Page 12
... The AD7984 can be interfaced to any 1 digital logic family available in a 10-lead MSOP or a tiny 10-lead QFN (LFCSP) that allows space savings and flexible configurations. ...
Page 13
... Transfer Functions The ideal transfer characteristic for the AD7984 is shown in Figure 22 and Table 7. 011 ... 111 011 ... 110 011 ... 101 100 ... 010 100 ... 001 100 ... 000 –FSR –FSR + 1 LSB –FSR + 0.5 LSB +FSR – 1.5 LSB ANALOG INPUT Figure 22. ADC Ideal Transfer Function VREF V– ...
Page 14
... AD7984. The noise from the driver is filtered by the AD7984 analog input circuit’s 1-pole, low- pass filter made by R and the external filter one is used. Because the typical noise of the AD7984 is 36.24 μV rms, the SNR degradation due to the amplifier is ⎛ ⎜ ⎜ 36.24 = ...
Page 15
... REF and GND pins. POWER SUPPLY The AD7984 uses two power supply pins: a core supply (VDD) and a digital input/output interface supply (VIO). VIO allows direct interface with any logic between 1.8 V and 5 reduce the number of supplies needed, VIO and VDD can be tied together ...
Page 16
... SDI hold time is such that when SDI and CNV are connected, the chain mode is always selected. In either mode, the AD7984 offers the option of forcing a start bit in front of the data bits. This start bit can be used as a busy signal indicator to interrupt the digital host and trigger the data reading ...
Page 17
... CS MODE, 3-WIRE WITHOUT BUSY INDICATOR This mode is usually used when a single AD7984 is connected to an SPI-compatible digital host. The connection diagram is shown in Figure 28, and the corresponding timing is given in Figure 29. With SDI tied to VIO, a rising edge on CNV initiates a conversion, selects the CS mode, and forces SDO to high impedance ...
Page 18
... AD7984 CS MODE, 3-WIRE WITH BUSY INDICATOR This mode is usually used when a single AD7984 is connected to an SPI-compatible digital host having an interrupt input. The connection diagram is shown in Figure 30, and the corresponding timing is given in Figure 31. With SDI tied to VIO, a rising edge on CNV initiates a conversion, selects the CS mode, and forces SDO to high impedance ...
Page 19
... CS MODE, 4-WIRE WITHOUT BUSY INDICATOR This mode is usually used when multiple AD7984s are connected to an SPI-compatible digital host. A connection diagram example using two AD7984s is shown in Figure 32, and the corresponding timing is given in Figure 33. With SDI high, a rising edge on CNV initiates a conversion, selects the CS mode, and forces SDO to high impedance. In this ...
Page 20
... AD7984 CS MODE, 4-WIRE WITH BUSY INDICATOR This mode is usually used when a single AD7984 is connected to an SPI-compatible digital host with an interrupt input and when it is desired to keep CNV, which is used to sample the analog input, independent of the signal used to select the data reading. This independence is particularly important in applications where low jitter on CNV is desired ...
Page 21
... SDO B readback. When the conversion is complete, the MSB is output onto SDO and the AD7984 enters the acquisition phase and goes into standby mode. The remaining data bits stored in the internal shift register are clocked by subsequent SCK falling edges. For each ADC, SDI feeds the input of the internal shift register and is clocked by the SCK falling edge. Each ADC in the chain outputs its data MSB first, and 18 × ...
Page 22
... When all ADCs in the chain have completed their conversions, the SDO pin of the ADC closest to the digital host (see the AD7984 ADC labeled C in Figure 38) is driven high. This transition on SDO can be used as a busy indicator to trigger the data readback controlled by the digital host. The AD7984 then enters the acquisition phase and goes into standby mode ...
Page 23
... Avoid running digital lines under the device because these couple noise onto the die, unless a ground plane under the AD7984 is used as a shield. Fast switching signals, such as CNV or clocks, should not run near analog signal paths. Crossover of digital and analog signals should be avoided. ...
Page 24
... Z = RoHS compliant part. 2 The EVAL-AD7984CBZ board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD3Z for evaluation/demonstration purposes. 3 The EVAL-CONTROL BRD3Z board allows control and communicate with all Analog Devices evaluation boards ending in the CB designator. ©2007–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...