AD7980 Analog Devices, AD7980 Datasheet
AD7980
Specifications of AD7980
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AD7980 Summary of contents
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... It is compatible with 1 logic, using the separate supply VIO. The AD7980 is housed in a 10-lead MSOP or a 10-lead QFN (LFCSP) with operation specified from −40°C to +125°C. 250 kSPS 400 kSPS to 500 kSPS ...
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... CS Mode 3-Wire with Busy Indicator ..................................... 18 CS Mode 4-Wire, Without Busy Indicator ............................. 19 CS Mode 4-Wire with Busy Indicator ..................................... 20 Chain Mode, Without Busy Indicator ..................................... 21 Chain Mode with Busy Indicator ............................................. 22 Application Hints ........................................................................... 23 Layout .......................................................................................... 23 Evaluating the Performance of the AD7980 ............................... 23 Outline Dimensions ....................................................................... 24 Ordering Guide .......................................................................... 25 Rev Page ...
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... AD7980 Unit Bits Bits 1 LSB 1 LSB 1 LSB 1 LSB 1 LSB 1 LSB 1 LSB ppm/°C mV ppm/°C LSB 1 MSPS ...
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... AD7980 VDD = 2.5 V, VIO = 2 5 REF Table 3. Parameter Conditions REFERENCE Voltage Range Load Current 1 MSPS, REF = 5 V SAMPLING DYNAMICS −3 dB Input Bandwidth Aperture Delay VDD = 2.5 V DIGITAL INPUTS Logic Levels V VIO > VIO > VIO ≤ VIO ≤ ...
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... HSDISCK t 15 DSDOSDI 1 Y% VIO 1 t DELAY AND MAXIMUM V USED. SEE DIGITAL INPUTS IH IL Figure 3. Voltage Levels for Timing AD7980 Unit ...
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... AD7980 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating Analog Inputs 1 1 IN+, IN− to GND −0 Supply Voltage REF, VIO to GND −0 VDD to GND −0 VDD to VIO + −6 V Digital Inputs to GND −0 VIO + 0.3 V Digital Outputs to GND − ...
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... AI = analog input digital input digital output, and P = power. VIO SDI SCK SDO CNV . REF Rev Page AD7980 REF 1 10 VIO VDD 2 9 SDI AD7980 IN SCK TOP VIEW (Not to Scale) IN– SDO GND 5 6 CNV Figure 5. 10-Lead QFN (LFCSP) Pin Configuration ...
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... AD7980 TERMINOLOGY Integral Nonlinearity Error (INL) INL refers to the deviation of each individual code from a line drawn from negative full scale through positive full scale. The point used as negative full scale occurs ½ LSB before the first code transition. Positive full scale is defined as a level 1½ LSB beyond the last code transition ...
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... Figure 9. Differential Nonlinearity vs. Code, REF = 5 V POSITIVE INL: +0.25 LSB NEGATIVE INL: –0.22 LSB 0 16384 32768 49152 CODE MSPS 10kHz IN SNR = 86.8dB THD = –111.4dB SFDR = 105.9dB SINAD = 86.8dB 0 100 200 300 400 FREQUENCY (kHz) Figure 11. FFT Plot, REF = 2.5 V AD7980 65536 65536 500 ...
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... AD7980 180k 168591 160k 140k 120k 100k 80k 60k 52710 38751 40k 20k 1201 27 829 8003 8004 8005 8006 8007 8008 8009 800A CODE IN HEX Figure 12. Histogram Input at the Code Center, REF = 5 V 70k 59691 59404 60k 50k 40k ...
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... Rev Page 100 FREQUENCY (kHz) Figure 21. THD vs. Frequency –35 – 105 TEMPERATURE (°C) Figure 22. THD vs. Temperature I VDD I REF I VIO –35 – 105 TEMPERATURE (°C) Figure 23. Operating Currents vs. Temperature AD7980 1000 125 125 ...
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... AD7980 VDD –55 –35 – TEMPERATURE (°C) Figure 24. Power-Down Currents vs. Temperature + I VIO 65 85 105 125 Rev Page ...
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... The AD7980 can be interfaced to any 1 digital logic family housed in a 10-lead MSOP or a tiny 10-lead QFN (LFCSP) that combines space savings and allows flexible configurations ...
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... AD7980 Transfer Functions The ideal transfer characteristic for the AD7980 is shown in Figure 26 and Table 7. 111 ... 111 111 ... 110 111 ... 101 000 ... 010 000 ... 001 000 ... 000 –FSR –FSR + 1LSB –FSR + 0.5LSB ANALOG INPUT Figure 26. ADC Ideal Transfer Function VREF V– ...
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... AD7980. The noise coming from the driver is filtered by the AD7980 analog input circuit’s 1-pole, low-pass filter made by R filter, if one is used. Because the typical noise of the AD7980 is 47.3 μV rms, the SNR degradation due to the amplifier is C where: ...
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... REF and GND pins. POWER SUPPLY The AD7980 uses two power supply pins: a core supply, VDD, and a digital input/output interface supply, VIO. VIO allows direct interface with any logic between 1.8 V and 5 reduce the number of supplies needed, VIO and VDD can be tied together ...
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... CS MODE, 3-WIRE, WITHOUT BUSY INDICATOR This mode is usually used when a single AD7980 is connected to an SPI-compatible digital host. The connection diagram is shown in Figure 31, and the corresponding timing is given in Figure 32. With SDI tied to VIO, a rising edge on CNV initiates a conversion, selects the CS mode, and forces SDO to high impedance ...
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... AD7980 CS MODE 3-WIRE WITH BUSY INDICATOR This mode is usually used when a single AD7980 is connected to an SPI-compatible digital host having an interrupt input. The connection diagram is shown in Figure 33, and the corresponding timing is given in Figure 34. With SDI tied to VIO, a rising edge on CNV initiates a conversion, selects the CS mode, and forces SDO to high impedance ...
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... Although the rising edge can be used to capture the data, a digital host using the SCK falling edge allows a faster reading rate provided it has an acceptable hold time. After the 16th SCK falling edge or when SDI goes high, whichever is earlier, SDO returns to high impedance and another AD7980 can be read. CNV CNV AD7980 ...
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... AD7980 CS MODE 4-WIRE WITH BUSY INDICATOR This mode is usually used when a single AD7980 is connected to an SPI-compatible digital host that has an interrupt input, and it is desired to keep CNV, which is used to sample the analog input, independent of the signal used to select the data reading. This requirement is particularly important in applications where low jitter on CNV is desired ...
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... CHAIN MODE, WITHOUT BUSY INDICATOR This mode can be used to daisy-chain multiple AD7980s on a 3-wire serial interface. This feature is useful for reducing component count and wiring connections, for example, in isolated multi-converter applications or for systems with a limited interfacing capacity. Data readback is analogous to clocking a shift register. ...
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... When all ADCs in the chain have completed their conversions, the SDO pin of the ADC closest to the digital host (see the AD7980 ADC labeled C in Figure 41) is driven high. This transition on SDO can be used as a busy indicator to trigger the data readback controlled by the digital host ...
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... The pinout of the AD7980, with all its analog signals on the left side and all its digital signals on the right side, eases this task. Avoid running digital lines under the device because these couple noise onto the die, unless a ground plane under the AD7980 is used as a shield ...
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... AD7980 OUTLINE DIMENSIONS PIN 1 INDEX AREA 0.80 0.75 0.70 SEATING PLANE 3.10 3.00 2. 5.15 3.10 4.90 3.00 4.65 2. PIN 1 0.50 BSC 0.95 0.85 1.10 MAX 0.75 0.15 0.33 SEATING 0.23 0.05 PLANE 0.17 0.08 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 45.10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters 0.30 3.00 0.23 BSC SQ 0.18 6 (BOTTOM VIEW) 0.50 0.40 5 0.30 TOP VIEW 0.80 MAX 0.55 NOM 0.05 MAX 0.02 NOM 0.20 REF * PADDLE CONNECTED TO GND ...
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... AD7980BRMZRL7 ±1.25 LSB max 1 AD7980ACPZ-RL ±2.5 LSB max 1 AD7980ACPZ-RL7 ±2.5 LSB max 1 AD7980BCPZ-RL ±1.25 LSB max 1 AD7980BCPZ-RL7 ±1.25 LSB max 1 AD7980BCPZ-R2 ±1.25 LSB max 1, 2 EVAL-AD7980CBZ EVAL-CONTROL BRD RoHS Compliant Part. 2 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD3 for evaluation/demonstration purposes. ...
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... AD7980 NOTES Rev Page ...
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... NOTES Rev Page AD7980 ...
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... AD7980 NOTES ©2007–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06392-0-6/09(B) Rev Page ...