AD9252 Analog Devices, AD9252 Datasheet
AD9252
Specifications of AD9252
Related parts for AD9252
AD9252 Summary of contents
Page 1
... The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user- defined test patterns entered via the serial port interface (SPI). The AD9252 is available in an RoHS compliant, 64-lead LFCSP specified over the industrial temperature range of −40°C to +85°C. PRODUCT HIGHLIGHTS 1 ...
Page 2
... AD9252 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Specifications .......................................................................... 4 Digital Specifications ................................................................... 5 Switching Specifications .............................................................. 6 Timing Diagrams .......................................................................... 7 Absolute Maximum Ratings ............................................................ 9 Thermal Impedance ..................................................................... 9 ESD Caution .................................................................................. 9 Pin Configuration and Function Descriptions ........................... 10 Equivalent Circuits ......................................................................... 12 Typical Performance Characteristics ........................................... 14 Theory of Operation ...................................................................... 17 Analog Input Considerations ...
Page 3
... Full Full Full Full Full Full Full Full Full Full 1.7 Full 1.7 Full Full Full Full Full Full Full Rev Page AD9252 AD9252-50 Typ Max Unit Bits Guaranteed ±1 ±8 mV ±3 ±8 mV ±1.5 ±2 ±0.3 ±0 ±0.4 ±1 LSB ±1.5 ±4 LSB ± ...
Page 4
... Full Full Full 70.2 Full Full Full Full 11.5 Full Full Full Full 73 Full Full Full Full Full Full Full Full Full Full 25°C 25°C Rev Page Data Sheet AD9252-50 Typ Max Unit 73 72 72 70.5 dB 11.87 Bits 11.84 Bits 11.79 Bits 11.5 Bits ...
Page 5
... Full 1.2 Full 0 25°C 30 25°C 2 Full 1.79 Full LVDS Full 247 Full 1.125 LVDS Full 150 Full 1.10 Rev Page AD9252 AD9252-50 Max 3.6 0.3 3.6 0.3 DRVDD + 0.3 0.3 0.05 454 1.375 Offset binary 250 1.30 Offset binary Unit mV p-p V kΩ kΩ kΩ ...
Page 6
... Full 1.5 Full Full Full 1.5 Full Full (t /28) − 300 SAMPLE Full (t /28) − 300 SAMPLE ) Full 25°C 25°C Full 25°C 25°C 25°C Rev Page Data Sheet AD9252-50 Typ Max 10 10.0 10.0 2.3 3.1 300 300 2.3 3 /28) FCO SAMPLE (t /28) (t /28) + 300 SAMPLE SAMPLE (t /28) ...
Page 7
... – – – – – – – – – – – – – 9 AD9252 MSB D12 N – – 8 MSB D10 N – – 8 ...
Page 8
... AD9252 N – 1 VIN ± CLK– CLK+ t CPD DCO– DCO+ t FCO FCO– FCO – FRAME t DATA LSB – – – – – – – 9 Figure 4 ...
Page 9
... PCB. −0 +2.0 V ESD CAUTION −0 +3.9 V −0 +2.0 V −0 +2.0 V −0 +3.9 V −0 +2.0 V −0 +2.0 V −40°C to +85°C −65°C to +150°C 150°C 300°C Rev Page AD9252 θ 1 θ θ Unit 17.7 °C/W 15.5 8.7 0.6 °C/W 13.9 ° ...
Page 10
... D − − B PIN 1 INDICATOR AVDD AVDD 4 EXPOSED PADDLE, PIN 0 5 (BOTTOM OF PACKAGE) 6 AVDD 7 AD9252 AVDD 8 TOP VIEW CLK– 9 (Not to Scale) CLK+ 10 AVDD 11 AVDD – Figure 5. 64-Lead LFCSP Pin Configuration, Top View ...
Page 11
... External Resistor to Set the Internal ADC Core Bias Current Reference Mode Selection Voltage Reference Input/Output Negative Differential Reference Positive Differential Reference ADC E Analog Input True ADC E Analog Input Complement ADC F Analog Input Complement ADC F Analog Input True Rev Page AD9252 ...
Page 12
... AD9252 EQUIVALENT CIRCUITS VIN ± x Figure 6. Equivalent Analog Input Circuit 10Ω CLK+ 10kΩ 10kΩ 10Ω CLK– Figure 7. Equivalent Clock Input Circuit 350Ω SDIO/ODM 30kΩ Figure 8. Equivalent SDIO/ODM Input Circuit 1.25V SCLK/DTP OR PDWN Rev Page Data Sheet ...
Page 13
... Data Sheet AVDD 70kΩ 1kΩ CSB Figure 12. Equivalent CSB Input Circuit 1kΩ SENSE Figure 13. Equivalent SENSE Circuit VREF Figure 14. Equivalent VREF Circuit Rev Page AD9252 6kΩ ...
Page 14
... SFDR = 72.92dBc FREQUENCY (MHz) = 120 MHz SAMPLE SFDR SNR ENCODE RATE (MSPS) Figure 19. SNR/SFDR vs 10.3 MHz, AD9252-50 SAMPLE IN SFDR SNR ENCODE RATE (MSPS) Figure 20. SNR/SFDR vs 19.7 MHz, AD9252-50 SAMPLE MSPS ...
Page 15
... MHz MSPS IN2 SAMPLE 90 85 SFDR 80 75 SNR 100 ANALOG INPUT FREQUENCY (MHz) Figure 25. SNR/SFDR vs MSPS IN SAMPLE 90 85 SFDR 80 75 SINAD –40 – TEMPERATURE (°C) = 19.7 MHz AD9252 20 25 1000 MSPS SAMPLE ...
Page 16
... AD9252 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 2000 4000 6000 8000 10000 12000 14000 CODE Figure 27. INL 2.3 MHz SAMPLE 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 2000 4000 6000 8000 10000 12000 14000 CODE Figure 28. DNL 2.3 MHz SAMPLE –30 –35 –40 –45 –50 – ...
Page 17
... Front-End for Wideband A/D for more information. In general, the precise values depend on the application. The analog inputs of the AD9252 are not internally dc-biased. Therefore, in ac-coupled applications, the user must provide this bias externally. Setting the device so that V recommended for optimum performance, but the device can function over a wider range with reasonable performance, as shown in Figure 34 and Figure 35 ...
Page 18
... In the case of the AD9252, the largest input span available p-p. Differential Input Configurations There are several ways to drive the AD9252 either actively or passively; however, optimum performance is achieved by driving the analog input differentially. For example, using the ...
Page 19
... This allows a wide range of clock input duty cycles without affecting the performance of the AD9252. When the DCS is on, noise and distortion perfor- mance are nearly flat for a wide range of duty cycles. However, some applications may require the DCS function to be off. If so, 0.1µ ...
Page 20
... ANALOG INPUT FREQUENCY (MHz) Figure 45. Ideal SNR vs. Input Frequency and Jitter Power Dissipation and Power-Down Mode As shown in Figure 46, the power dissipated by the AD9252 is proportional to its sample rate. The digital power dissipation does not vary much because it is determined primarily by the DRVDD supply and bias current of the LVDS output drivers. ...
Page 21
... An example of the FCO and data stream when the AD9252 is used with traces of proper length and position is shown in Figure 47. CH1 500mV/DIV = FCO ...
Page 22
... AD9252 500 EYE: ALL BITS 400 300 200 100 0 –100 –200 –300 –400 –500 –1.5ns –1.0ns –0.5ns 0ns 0.5ns –150ps –100ps –50ps 0ps 50ps Figure 48. Data Eye for LVDS Outputs in ANSI-644 Mode with Trace Lengths ...
Page 23
... Data Sheet Two output clocks are provided to assist in capturing data from the AD9252. The DCO is used to clock the output data and is equal to seven times the sample clock (CLK) rate. Data is clocked out of the AD9252 and must be captured on the rising and Table 9. Flexible Output Test Modes ...
Page 24
... Section 5.6 of the ITU-T 0.150 (05/96) standard. The only differences are that the starting value must be a specific value instead of all 1s (see Table 10 for the initial values) and the AD9252 inverts the bit stream with relation to the ITU standard. Table 10. PN Sequence Initial ...
Page 25
... Voltage Reference A stable, accurate 0.5 V voltage reference is built into the AD9252. This is gained up internally by a factor of 2, setting VREF to 1.0 V, which results in a full-scale differential input span p-p. VREF is set internally by default; however, the VREF pin can be driven externally with a 1.0 V reference to improve accuracy ...
Page 26
... AD9252 External Reference Operation The use of an external reference may be necessary to enhance the gain accuracy of the ADC or improve thermal drift charac- teristics. Figure 54 shows the typical drift characteristics of the internal reference mode. When the SENSE pin is tied to AVDD, the internal reference is disabled, allowing the use of an external reference. The external reference is loaded with an equivalent 6 kΩ ...
Page 27
... If multiple SDIO pins share a common connection, care should be taken to ensure that proper V load for each AD9252, Figure 55 shows the number of SDIO pins that can be connected together and the resulting V This interface is flexible enough to be controlled by either serial ...
Page 28
... AD9252 CSB SCLK DON’T CARE R A12 SDIO DON’T CARE Table 15. Serial Timing Definitions Parameter Timing (Minimum, ns CLK EN_SDIO t 10 DIS_SDIO 1.800 1.795 1.790 1.785 1 ...
Page 29
... Addresses that have values marked as 0 should be considered reserved and have 0 written to their registers during power-up. DEFAULT VALUES When the AD9252 comes out of a reset, critical registers are preloaded with default values. These values are indicated in Table 16, where an X refers to an undefined feature. ...
Page 30
... Bit 5 Bit 4 Bit 3 Bit 2 Soft Soft 1 1 reset reset off 0 = off (default) (default) 8-bit Chip ID Bits [7:0] (AD9252 = 0x09), (default Data Data Channel Channel (default) (default off 0 = off Clock Clock ...
Page 31
... Rev Page AD9252 Default (LSB) Value Notes/ Bit 1 Bit 0 (Hex) Comments 00 = offset binary 0x00 Configures the (default) outputs and the 01 = twos complement format of the data. ...
Page 32
... AD9252 APPLICATIONS INFORMATION DESIGN GUIDELINES Before starting design and layout of the AD9252 as a system recommended that the designer become familiar with these guidelines, which discuss the special circuit connections and layout requirements needed for certain pins. Power and Ground Recommendations When connecting power to the AD9252 recommended that two separate 1 ...
Page 33
... Figure 62 to Figure 66). Figure 58 shows the typical bench characterization setup used to evaluate the ac performance of the AD9252 critical that the signal sources used for the analog input and clock have very low phase noise (<1 ps rms jitter) to realize the optimum performance of the converter ...
Page 34
... AD9252 DEFAULT OPERATION AND JUMPER SELECTION SETTINGS The following is a list of the default and optional settings or modes allowed on the AD9252 Rev. A evaluation board. Power: Connect the switching power supply that is provided with the evaluation kit between a rated 100 240 V ac wall outlet and P701. ...
Page 35
... MHz, Two-Pole Low-Pass Filter Applied to the AD8334 Outputs (Analog Input Signal = −1.03 dBFS, SNR = 60.2 dBc, SFDR = 66.23 dBc) Rev Page 680nH 68pF 680nH 50MSPS SAMPLE AIN = 3.5MHz –20 AD8334 = MAX GAIN SETTING –40 –60 –80 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 FREQUENCY (MHz) Figure 61. AD9252 FFT Example Results Using AD9252 20.0 22.5 25.0 ...
Page 36
... AD9252 Figure 62. Evaluation Board Schematic, DUT Analog Inputs Rev Page Data Sheet 06296-072 ...
Page 37
... Data Sheet Figure 63. Evaluation Board Schematic, DUT Analog Inputs (Continued) Rev Page AD9252 06296-073 ...
Page 38
... AD9252 49 VIN+C VIN_C 50 VIN−C VIN_C 51 AVDD AVDD_DUT 52 VIN−D VIN_D 53 R301 VIN_D VIN+D 10kΩ 54 RBIAS 55 SENSE VSENSE_DUT 56 VREF VREF_DUT 57 REFB 58 REFT 59 AVDD_DUT AVDD 60 VIN_E VIN+E 61 VIN−E VIN_E 62 AVDD_DUT AVDD 63 VIN−F VIN_F 64 VIN_F VIN+F 0 SLUG Figure 64. Evaluation Board Schematic, DUT, VREF, and Digital Output Interface ...
Page 39
... Data Sheet GND RSET S10 6 VREF Figure 65. Evaluation Board Schematic, Clock Circuitry Rev Page AD9252 06296-075 ...
Page 40
... AD9252 C510 C509 10µF 0.1µF R505 AVDD_5V 10kΩ AVDD_5V C505 0.1µF R503 274Ω C502 0.018µF 0.1µF C501 AVDD_5V CW GND VG12 Variable Gain Circuit (0−1.0V DC) VG12 External Variable Gain Drive Figure 66. Evaluation Board Schematic, Optional DUT Analog Input Drive ...
Page 41
... LMD4 R609 20 274Ω INH4 19 COM4 18 COM3 17 C627 0.018µF C626 22pF L604 120nH 0.1µF C625 R608 274Ω C621 0.018µF C620 22pF L603 120nH 0.1µF C619 AVDD_5V CW GND VG78 Variable Gain Circuit (0−1.0V DC) VG78 External Variable Gain Drive AD9252 ...
Page 42
... AD9252 CR702 GREEN R709 0Ω SDO_CHA 0Ω R708 SDI_CHA R707 0Ω SCLK_CHA R706 0Ω CSB1_CHA 2 Figure 68. Evaluation Board Schematic, Power Supply Inputs and SPI Interface Circuitry C702 C703 0.1µF 0.1µF PICVCC 1 2 PICVCC GP1 3 4 GP1 GP0 5 6 GP0 MCLR/GP3 8 7 MCLR/GP3 ...
Page 43
... Data Sheet Figure 69. Evaluation Board Layout, Primary Side Rev Page AD9252 ...
Page 44
... AD9252 Figure 70. Evaluation Board Layout, Ground Plane Rev Page Data Sheet ...
Page 45
... Data Sheet Figure 71. Evaluation Board Layout, Power Plane Rev Page AD9252 ...
Page 46
... AD9252 Figure 72. Evaluation Board Layout, Secondary Side (Mirrored Image) Rev Page Data Sheet ...
Page 47
... X5R Capacitor 603 4.7 μF, ceramic, X5R, 6.3 V, 10% tol Capacitor 402 1000 pF, ceramic, X7R 10% tol Capacitor 402 0.018 μF, ceramic, X7R 10% tol Rev Page AD9252 Manufacturer Manufacturer Part Number Murata GRM155R71C104KA88D Murata GRM1555C1H2R20CZ01D Murata GRM219R60J106KE19D Murata GRM188R60J475KE19D Murata GRM155R71H102KA01D ...
Page 48
... AD9252 Qty per Reference Item Board Designator 8 8 C503, C514, C520, C526, C603, C614, C620, C626 9 1 C704 10 9 C307, C714, C715, C716, C717, C719, C720, C721, C722 11 16 C540, C541, C544, C545, C548, C549, C552, C553, C640, C641, C644, C645, ...
Page 49
... W, 5% tol Resistor 402 64.9 Ω, 1/ tol Resistor 603 0 Ω, 1/ tol Resistor 402 1 kΩ, 1/ tol Resistor 402 33 Ω, 1/ tol Rev Page AD9252 Manufacturer Manufacturer Part Number NIC NRC04Z0TRF Components Corp. Valpey Fisher VFAC3-BHL-50MHz Johnson 142-0701-851 Components Tyco ...
Page 50
... AD9252 Qty per Reference Item Board Designator 37 8 R161, R162, R163, R164, R208, R225, R241, R259 38 3 R303, R305, R306 39 1 R414 40 1 R404 41 1 R309 42 5 R310, R501, R535, R601, R634 43 1 R308 44 4 R502, R536, R602, R635 45 16 R513, R514, R518, ...
Page 51
... IC SOT-223 ADP3339AKC-1.8-RL, 1.5 A, 1.8 V LDO regulator IC CP-64-3 AD8334ACPZ-REEL, ultralow noise precision dual VGA IC SOT-223 ADP3339AKC-5-RL7 IC SOT-223 ADP3339AKC-3.3-RL IC CP-64-3 AD9252BCPZ-50, octal, 14-bit, 50 MSPS serial LVDS 1.8 V ADC IC SOT-23 ADR510ARTZ, 1.0 V, precision low noise shunt voltage reference IC LFCSP AD9515BCPZ, 1.6 GHz CP-32-2 clock distribution IC IC SC70, NC7WZ07P6X_NL, MAA06A UHS dual buffer ...
Page 52
... Range AD9252ABCPZ-50 −40°C to +85°C AD9252ABCPZRL7-50 −40°C to +85°C 2 AD9252-50EBZ RoHS Compliant Part. 2 Interposer board (HSC-ADC-FIFO5-INTZ) is required to connect to HSC-ADC-EVALCZ data capture board. ©2006–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. ...