AD7621 Analog Devices, AD7621 Datasheet

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AD7621

Manufacturer Part Number
AD7621
Description
16-Bit, 2 LSB INL, 3 MSPS PulSAR® ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7621

Resolution (bits)
16bit
# Chan
1
Sample Rate
3MSPS
Interface
Byte,Par,Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(2Vref) p-p
Adc Architecture
SAR
Pkg Type
CSP,QFP

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FEATURES
Throughput
2.048 V internal reference
Differential input range: ±V
INL: ±2 LSB maximum, ±1 LSB typical
16-bit resolution with no missing codes
SINAD: 89 dB typical @ 100 kHz
THD: −101 dB typical @ 100 kHz
No pipeline delay (SAR architecture)
Parallel (16- or 8-bit bus) and serial 5 V/3.3 V/2.5 V interface
SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible
2.5 V single-supply operation
Power dissipation: 65 mW typical @ 3 MSPS
48-lead LQFP and 48-lead LFCSP_VQ packages
Speed upgrade of the
APPLICATIONS
Medical instruments
High speed data acquisition
Digital signal processing
Communications
Instrumentation
Spectrum analysis
ATE
GENERAL DESCRIPTION
The AD7621 is a 16-bit, 3 MSPS, charge redistribution SAR,
fully differential analog-to-digital converter (ADC) that
operates from a single 2.5 V power supply. It contains a high
speed 16-bit sampling ADC, an internal conversion clock, an
internal reference (and buffer), error correction circuits, and
both serial and parallel system interface ports. It features two
very high sampling rate modes (wideband warp and warp), a
fast mode (normal) for asynchronous rate applications, and a
reduced power mode (impulse) for low power applications
where the power is scaled with the throughput. Operation is
specified from −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
3 MSPS (wideband warp and warp mode)
2 MSPS (normal mode)
1.25 MSPS (impulse mode)
AD7677
REF
(V
REF
up to 2.5 V)
16-Bit, 2 LSB INL, 3 MSPS PulSAR
Table 1. PulSAR Selection
Type/kSPS
Pseudo
True Bipolar
True
18-Bit
Multichannel/
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Differential
Differential
Simultaneous
PDBUF
PDREF
RESET
AGND
AVDD
IN+
IN–
Fast Throughput.
The AD7621 is a 3 MSPS, charge redistribution,
16-bit SAR ADC.
Superior Linearity.
The AD7621 has no missing 16-bit code.
Internal Reference.
The AD7621 has a 2.048 V internal reference with a
typical drift of ±7 ppm/°C.
Single-Supply Operation.
The AD7621 operates from a 2.5 V single supply and
typically dissipates 65 mW. In impulse mode, its power
dissipation decreases with th
Serial or Parallel Interface.
Versatile parallel (16- or 8-bit bus) or 2-wire serial interf
arrangement compatible with 2.5 V, 3.3 V, or 5 V logic.
PD
TEMP
REF
FUNCTIONAL BLOCK DIAGRAM
CALIBRATION CIRCUITRY
WARP IMPULSE
CONTROL LOGIC AND
REFBUFIN
REF AMP
100 to 250
AD7651
AD7660/61
AD7663
AD7675
AD7678
SWITCHED
CAP DAC
©2005 Analog Devices, Inc. All rights reserved.
REF REFGND
CNVST
CLOCK
Figure 1.
500 to 570
AD7650/52
AD7664/66
AD7665
AD7676
AD7679
AD7654
AD7621
e throughput.
INTERFACE
PARALLEL
SERIAL
DVDD
PORT
800 to
1000
AD7653
AD7667
AD7671
AD7677
AD7674
AD7655
www.analog.com
DGND
AD7621
16
®
OVDD
OGND
D[15:0]
SER/PAR
BUSY
RD
CS
OB/2C
BYTESWAP
ADC
>1000
AD7621
AD7641
ace

Related parts for AD7621

AD7621 Summary of contents

Page 1

... Internal Reference. The AD7621 has a 2.048 V internal reference with a typical drift of ±7 ppm/°C. 4. Single-Supply Operation. The AD7621 operates from a 2.5 V single supply and typically dissipates 65 mW. In impulse mode, its power dissipation decreases with th 5. Serial or Parallel Interface. Versatile parallel (16- or 8-bit bus) or 2-wire serial interf arrangement compatible with 2 ...

Page 2

... Revision 0: Initial Version Voltage Reference Input ............................................................ 18 Power Supply............................................................................... 19 Power Dissipation vs. Throughput .......................................... 20 Conversion Control ................................................................... 20 Interfaces.......................................................................................... 21 Digital Interface.......................................................................... 21 Parallel Interface......................................................................... 21 Serial Interface ............................................................................ 22 Master Serial Interface............................................................... 22 Slave Serial Interface .................................................................. 24 Microprocessor Interfacing....................................................... 26 Application ...................................................................................... 27 Layout .......................................................................................... 27 Evaluating the AD7621 Performance ...................................... 27 Outline Dimensions ....................................................................... 28 Ordering Guide .......................................................................... 29 Rev Page ...

Page 3

... MSPS 4 ±1 +2 LSB Bits +2 LSB 0.69 LSB 0.82 LSB +30 LSB ±1 ppm/°C +0. FSR ±2 ppm/°C ±3 LSB 6 90 89.2 dB 103 dB 101 dB –102 dB −100 dB 89 MHz rms 50 ns 2.048 2.058 V ±7 ppm/°C ±15 ppm/V AD7621 ...

Page 4

... AD7621 Parameter Turn-On Settling Time REFBUFIN Output Voltage REFBUFIN Output Resistance EXTERNAL REFERENCE Voltage Range Current Drain REFERENCE BUFFER REFBUFIN Input Voltage Range TEMPERATURE PIN Voltage Output Temperature Sensitivity Output Resistance DIGITAL INPUTS Logic Levels DIGITAL OUTPUTS ...

Page 5

... MAX Min Typ Max 333/500/800 23 283/430/560 1 10 283/430/560 50/70/ 600 283/430/560 12/137/263 0 See Table 4 275/400/500 13 AD7621 Unit ...

Page 6

... AD7621 Parameter 5 SLAVE SERIAL INTERFACE MODES (Refer to Figure 40 and Figure 41) External SCLK Setup Time External SCLK Active Edge to SDOUT Delay SDIN Setup Time SDIN Hold Time External SCLK Period External SCLK High External SCLK Low 1 See the Conversion Control section. 2 All timings for wideband warp mode are the same as warp mode. ...

Page 7

... ESD CAUTION = 91°C/ 26°C/W. JA Rev Page AD7621 ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to ...

Page 8

... When EXT/INT = high: slave mode. The output data is synchronized to an external clock signal, gated by CS, connected to the SCLK input AGND 1 PIN 1 AVDD 2 IDENTIFIER NC 3 BYTESWAP 4 OB/2C 5 AD7621 WARP 6 TOP VIEW IMPULSE 7 (Not to Scale) SER/PAR D2/DIVSCLK[0] 11 D3/DIVSCLK[1] ...

Page 9

... When SER/PAR = high, serial data output. In serial mode, this pin is used as the serial data output synchronized to SCLK. Conversion results are stored in an on-chip register. The AD7621 provides the conversion result, MSB first, from its internal shift register. The data format is determined by the logic level of OB/2C ...

Page 10

... RESET DI Reset Input. When high, reset the AD7621. Current conversion if any is aborted. Falling edge of RESET enables the calibration mode indicated by pulsing BUSY high. Refer to the Digital Interface section. If not used, this pin can be tied to DGND. 34 ...

Page 11

... CNVST input to when the input signal is held for a conversion. Transient Response The time required for the AD7621 to achieve its rated accuracy after a full-scale step function is applied to its input. Reference Voltage Temperature Coefficient Reference voltage temperature coefficient is derived from the typical shift of output voltage at 25° ...

Page 12

... AD7621 TYPICAL PERFORMANCE CHARACTERISTICS 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 16384 32768 CODE Figure 5. Integral Nonlinearity vs. Code 160000 149969 140000 120000 100000 80000 54791 60000 51847 40000 20000 2080 7FFC 7FFD 7FFE 7FFF 8000 8001 CODE IN HEX Figure 6. Histogram of 261,120 Conversions Input at the Code Center (External Reference) 2 ...

Page 13

... TEMPERATURE ( ° C) Figure 15. SNR, SINAD, and ENOB vs. Temperature SFDR THD THIRD HARMONIC SECOND HARMONIC –35 – TEMPERATURE ( ° C) Figure 16. THD, Harmonics, and SFDR vs. Temperature AD7621 16.0 15.5 15.0 14.5 14.0 125 110 105 100 105 125 ...

Page 14

... AD7621 91.0 SNR 90.5 SINAD 90.0 89.5 –60 –50 –40 –30 INPUT LEVEL (dB) Figure 17. SNR and SINAD vs. Input Level (Referred to Full Scale AVDD –55 –35 – TEMPERATURE ( ° C) Figure 18. Power-Down Operating Currents vs. Temperature 100k –20 –10 0 280 270 260 OVDD, 3 ...

Page 15

... ADC that does not exhibit any pipeline or latency, making it ideal for multiple multiplexed channel applications. The AD7621 can be operated from a single 2.5 V supply and be interfaced to either 2.5 V digital logic housed in 48-lead LQFP or tiny LFCSP packages that combine space savings with flexibility, allowing the AD7621 to be configured as either a serial or parallel interface ...

Page 16

... AD7621 TRANSFER FUNCTIONS Using the OB/ 2C digital input, the AD7621 offers two output codings: straight binary and twos complement. The LSB size with V = 2.048 × V /65536, which is 62.5 μV. Refer to REF REF Figure 22 and Table 7 for the ideal transfer characteristic. 111...111 111 ...

Page 17

... MHz, thereby reducing an undesirable aliasing effect while limiting noise from the inputs. Since the input impedance of the AD7621 is very high, the AD7621 can be directly driven by a low impedance source without gain error. To further improve the noise filtering achieved by the AD7621 analog input circuit, an external, one- pole RC filter between the amplifier’ ...

Page 18

... N VOLTAGE REFERENCE INPUT The AD7621 allows the choice of either a very low temperature drift internal voltage reference or an external reference. Unlike many ADCs with internal references, the internal with a noise gain reference of the AD7621 provides excellent performance and can be used in almost all applications. ...

Page 19

... Figure 28. ANALOG INPUT (UNIPOLAR) POWER SUPPLY The AD7621 uses three sets of power supply pins: an analog 2.5 V supply AVDD, a digital 2.5 V core supply DVDD, and a digital input/output interface supply OVDD. The OVDD supply allows direct interface with any logic working between 2.3 V and 5. reduce the number of supplies needed, the digital core (DVDD) can be supplied through a simple RC filter from the analog supply as shown in Figure 23 ...

Page 20

... SAMPLING RATE (SPS) Figure 30. Power Dissipation vs. Sample Rate CONVERSION CONTROL The AD7621 is controlled by the CNVST input. A falling edge on CNVST is all that is necessary to initiate a conversion. Detailed timing diagrams of the conversion process are shown in Figure 31. Once initiated, it cannot be restarted or aborted, even by the power-down input, PD, until the conversion is complete ...

Page 21

... RD is generally used to enable the conversion result on the data bus. RESET The RESET input is used to reset the AD7621 and generate a fast initialization. A rising edge on RESET aborts the current conversion (if any) and tristates the data bus. The falling edge of RESET clears the data bus and engages the initialization process indicated by pulsing BUSY high ...

Page 22

... Figure 36. 8-Bit and 16-Bit Parallel Interface SERIAL INTERFACE The AD7621 is configured to use the serial interface when SER/ PAR is held high. The AD7621 outputs 16 bits of data, MSB first, on the SDOUT pin. This data is synchronized with the 16 clock pulses provided on the SCLK pin. The output data 4 is valid on both the rising and falling edge of the data clock ...

Page 23

... Figure 38. Master Serial Data Timing for Reading (Read Previous Conversion During Convert) RDC/SDIN = 0 INVSCLK = INVSYNC = D15 D14 t 23 RDC/SDIN = 1 INVSCLK = INVSYNC = D14 Rev Page AD7621 ...

Page 24

... Figure 40 and Figure 41 show the detailed timing diagrams of these methods. While the AD7621 is performing a bit decision important that voltage transients be avoided on digital input/output pins or degradation of the conversion result could occur. This is ...

Page 25

... Figure 41. Slave Serial Data Timing for Reading (Read Previous Conversion During Convert) EXT/INT = 1 INVSCLK = D14 D13 X14 X13 EXT/INT = 1 INVSCLK = D14 D13 Rev Page X15 X14 Y15 Y14 AD7621 ...

Page 26

... Figure 42 shows an interface diagram between the AD7621 and an SPI-equipped DSP, ADSP-219x. To accommodate the slower speed of the DSP, the AD7621 acts as a slave device and data must be read after conversion. This mode also allows the daisy- chain feature. The convert command could be initiated in response to an internal timer interrupt ...

Page 27

... Digital and analog ground planes should be joined in only one place, preferably underneath the AD7621 close as possible to the AD7621. If the AD7621 system where multiple devices require analog-to-digital ground connections, the connections should still be made at one point only, a star ground point, established as close as possible to the AD7621 ...

Page 28

... AD7621 OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 0.05 VIEW A ROTATED 90° CCW 7.00 BSC SQ PIN 1 INDICATOR TOP VIEW 1.00 12° MAX 0.85 0.80 SEATING PLANE 0.75 1.60 0.60 MAX 0.45 0.20 0.09 7° 3.5° 12 0° SEATING 0.08 MAX PLANE VIEW A 0.50 COPLANARITY BSC LEAD PITCH COMPLIANT TO JEDEC STANDARDS MS-026BBC Figure 43. 48-Lead Low Profile Quad Flatpack (LQFP) [ST-48] Dimensions shown in millimeters ...

Page 29

... AD7621ACPZ −40°C to +85°C 1 AD7621ACPZRL −40°C to +85°C AD7621AST −40°C to +85°C AD7621ASTRL −40°C to +85°C 1 AD7621ASTZ −40°C to +85°C AD7621ASTZRL 1 −40°C to +85°C 2 EVAL-AD7621CB 3 EVAL-CONTROLBRD3 Pb-free part. 2 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD3 for evaluation/demonstration purposes. ...

Page 30

... AD7621 NOTES Rev Page ...

Page 31

... NOTES Rev Page AD7621 ...

Page 32

... AD7621 NOTES ©2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04565–0–5/05(0) Rev Page ...

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