AD7799 Analog Devices, AD7799 Datasheet

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AD7799

Manufacturer Part Number
AD7799
Description
3-Channel, Low Noise, Low Power, 24-Bit, Sigma Delta ADC with On-Chip In-Amp
Manufacturer
Analog Devices
Datasheet

Specifications of AD7799

Resolution (bits)
24bit
# Chan
3
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(2Vref/PGA Gain) p-p
Adc Architecture
Sigma-Delta
Pkg Type
SOP

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FEATURES
RMS noise:
Current: 380 μA typical
Power-down: 1 μA maximum
Low noise, programmable gain, instrumentation amp
Update rate: 4.17 Hz to 470 Hz
3 differential inputs
Internal clock oscillator
Simultaneous 50 Hz/60 Hz rejection
Reference detect
Low-side power switch
Programmable digital outputs
Burnout currents
Power supply: 2.7 V to 5.25 V
–40°C to +105°C temperature range
Independent interface power supply
16-lead TSSOP package
INTERFACE
3-wire serial
SPI®, QSPI™, MICROWIRE™, and DSP compatible
Schmitt trigger on SCLK
APPLICATIONS
Weigh scales
Pressure measurement
Strain gauge transducers
Gas analysis
Industrial process control
Instrumentation
Portable instrumentation
Blood analysis
Smart transmitters
Liquid/gas chromotography
6-digit DVM
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
27 nV at 4.17 Hz (AD7799)
65 nV at 16.7 Hz (AD7799)
40 nV at 4.17 Hz (AD7798)
85 nV at 16.7 Hz (AD7798)
16-/24-Bit,
3-Channel, Low Noise, Low Power,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
AIN3(+)/P1
AIN3(–)/P2
GENERAL DESCRIPTION
The AD7798/AD7799 are low power, low noise, complete
analog front ends for high precision measurement applications.
The AD7798/AD7799 contains a low noise, 16-/24-bit ∑-Δ
ADC with three differential analog inputs. The on-chip, low
noise instrumentation amplifier means that signals of small
amplitude can be interfaced directly to the ADC. With a gain
setting of 64, the rms noise is 27 nV for the AD7799 and 40 nV
for the AD7798 when the update rate equals 4.17 Hz.
On-chip features include a low-side power switch, reference
detect, programmable digital output pins, burnout currents,
and an internal clock oscillator. The output data rate from the
part is software-programmable and can be varied from 4.17 Hz
to 470 Hz.
The part operates with a power supply from 2.7 V to 5.25 V.
The AD7798 consumes a current of 300 μA typical, whereas the
AD7799 consumes 380 μA typical. Both devices are housed in a
16-lead TSSOP package.
Σ
AIN1(+)
AIN1(–)
AIN2(+)
AIN2(–)
PSW
-
Δ
GND
MUX
ADC with On-Chip In-Amp
AD7798/AD7799
FUNCTIONAL BLOCK DIAGRAM
GND
AV
GND
AV
©2005–2007 Analog Devices, Inc. All rights reserved.
DD
DD
IN-AMP
INTERNAL
CLOCK
Figure 1.
REFIN(+)
AD7798/AD7799
ADC
Σ-Δ
REFIN(–)
AD7798: 16-BIT
AD7799: 24-BIT
REFERENCE
INTERFACE
DETECT
CONTROL
SERIAL
LOGIC
AND
www.analog.com
DOUT/RDY
DIN
SCLK
CS
DV
DD

Related parts for AD7799

AD7799 Summary of contents

Page 1

... ADC. With a gain setting of 64, the rms noise for the AD7799 and 40 nV for the AD7798 when the update rate equals 4.17 Hz. On-chip features include a low-side power switch, reference detect, programmable digital output pins, burnout currents, and an internal clock oscillator ...

Page 2

... General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Characteristics..................................................................... 6 Absolute Maximum Ratings............................................................ 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 Output Noise and Resolution Specifications .............................. 10 AD7798 ........................................................................................ 10 AD7799 ........................................................................................ 11 Typical Performance Characteristics ........................................... 12 On-Chip Registers .......................................................................... 13 Communication Register .......................................................... 13 Status Register ............................................................................. 14 Mode Register ............................................................................. 14 Configuration Register .............................................................. 16 Data Register ............................................................................... 17 ID Register................................................................................... 17 REVISION HISTORY 3/07— ...

Page 3

... Rev Page AD7798/AD7799 to T MIN MAX Test Conditions/Comments AD7799: f < 242 Hz ADC AD7798 See Table 5 to Table 8 See Table 5 to Table 8 AIN = 1 V/gain, gain ≥ REFIN(+) – REFIN(–), gain = 1 to 128 REF Gain = ...

Page 4

... Output High Voltage Output Low Voltage Output High Voltage Output Low Voltage Floating-State Leakage Current Floating-State Output Capacitance Data Output Coding 1 AD7798B/AD7799B Unit 2.5 V nom 0.1 V min AV V max DD GND − min max DD 400 nA/V typ ± ...

Page 5

... Buffered mode, gain = 130 μA typ @ AV 165 μA typ @ AD7798: gain = 4 to 128, 300 μA typ @ AV 350 μA typ @ AD7799: gain = 4 to 128, 380 μA typ @ AV 440 μA typ @ − 1.6 V typically. When this voltage gain = 25°C). ...

Page 6

... AD7798/AD7799 TIMING CHARACTERISTICS 5.25 V, GND = 0 V, Input Logic Input Logic Table Parameter Limit MIN MAX t 100 3 t 100 4 Read Operation Write Operation ...

Page 7

... CS ( MSB DOUT/RDY ( SCLK ( INPUT OUTPUT Figure 3. Read Cycle Timing Diagram CS ( SCLK ( DIN (I) MSB I = INPUT OUTPUT Figure 4. Write Cycle Timing Diagram Rev Page AD7798/AD7799 LSB LSB ...

Page 8

... AD7798/AD7799 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter Rating AV to GND −0 GND −0 Analog Input Voltage to GND −0 Reference Input Voltage to GND −0 Digital Input Voltage to GND −0 Digital Output Voltage to GND − ...

Page 9

... AIN2(– REFIN(+) Figure 5. Pin Configuration and GND + 0.1 V. The nominal reference voltage (REFIN(+) – REFIN(−)) is 2.5 V, but the part − 0 voltage is independent of the voltage Rev Page AD7798/AD7799 and GND DD and GND DD ; therefore, AV can equal ...

Page 10

... AD7798/AD7799 OUTPUT NOISE AND RESOLUTION SPECIFICATIONS AD7798 Table 5 shows the AD7798 output rms noise for some update rates and gain settings. The numbers given are for the bipolar input range with a 2.5 V reference. These numbers are typical and are generated with a differential input voltage Table 6 shows the effective resolution, and the output peak-to-peak resolution is shown in parentheses ...

Page 11

... V. Table 8 shows the effective resolution, and the output peak-to-peak resolution is given in parentheses. Note that the effective Table 7. Output RMS Noise (μV) vs. Gain and Output Update Rate for the AD7799 Using a 2.5 V Reference Update Rate Gain of 1 Gain ...

Page 12

... Figure 8. AD7799 Noise ( /2, Gain = 64, Update Rate = 16.7 Hz) REF DD 600 800 999 = AV /2, REF DD 600 800 999 Rev Page CODE Figure 9. AD7799 Noise Distribution Histogram (V Gain = 64, Update Rate = 16.7 Hz) 3 UPDATE RATE = 16.6Hz T = 25°C A 2.5 2.0 1.5 1.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 REFERENCE VOLTAGE (V) Figure 10 ...

Page 13

... IO register Offset register Full-scale register CR4 CR3 CR2 RS1(0) RS0(0) CREAD(0) Rev Page AD7798/AD7799 CR1 CR0 0(0) 0(0) Register Size 8 bits 8 bits 16 bits 16 bits 16 bits (AD7798)/24 bits (AD7799) 8 bits 8 bits 16 bits (AD7798)/24 bits (AD7799) 16 bits (AD7798)/24 bits (AD7799) ...

Page 14

... Bit Name Description MR15 to MR13 MD2 to MD0 Mode Select Bits. These bits select the operational mode of the AD7798/AD7799 (see Table 13). MR12 PSW Power Switch Control Bit. Set by user to close the power switch PSW to GND. The power switch can sink mA. Cleared by user to open the power switch. When the ADC is placed in power-down mode, the power switch is opened ...

Page 15

... Idle Mode. In idle mode, the ADC filter and modulator are held in a reset state, although the modulator clocks are still provided Power-Down Mode. In this mode, all AD7798/AD7799 circuitry is powered down, including the burnout currents Internal Zero-Scale Calibration. An internal short is automatically connected to the enabled channel. A calibration takes two conversion cycles to complete ...

Page 16

... AD7798/AD7799 CONFIGURATION REGISTER RS2, RS1, RS0 = Power-On/Reset = 0x0710 The configuration register is a 16-bit register from which data can be read or to which data can be written. This register is used to configure the ADC for unipolar or bipolar mode, to enable or disable the buffer, to enable or disable the burnout currents, to select the gain, and to select the analog input channel ...

Page 17

... Each analog input channel has a dedicated offset register that holds the offset calibration coefficient for the channel. This register is 16 bits wide on the AD7798 and 24 bits wide on the AD7799, and its power-on/reset value is 8000(00) hex. The offset register is used in conjunction with its associated full-scale register to form a register pair. The power-on/reset value is automatically overwritten if an internal or system zero-scale calibration is initiated by the user ...

Page 18

... IN+ OUT– OUT+ IN– OVERVIEW The AD7798/AD7799 are low power ADCs that each incorporate a ∑-Δ modulator, a buffer, an in-amp, and on-chip digital filtering intended for the measurement of wide dynamic range, low frequency signals, such as those in pressure transducers and weigh scales. Each part has three differential inputs that can be buffered or unbuffered ...

Page 19

... The serial interface can be reset by writing a series the DIN input Logic 1 is written to the AD7798/AD7799 line for at least 32 serial clock cycles, the serial interface is reset. This ensures that the interface can be reset to a known state if the interface is lost due to a software error or a glitch in the system ...

Page 20

... DIN DOUT/RDY SCLK Continuous-Conversion Mode This is the default power-up mode. The AD7798/AD7799 continuously converts, with the RDY bit in the status register going low each time a conversion is complete low, the DOUT/ RDY line also goes low when a conversion is complete. To read a conversion, the user can write to the communication register, indicating that the next operation is a read of the data ...

Page 21

... If the user does not read the conversion before the completion of the next conversion insufficient serial clocks are applied to the AD7798/AD7799 to read the word, the serial output register is reset when the next conversion is complete, and the new conversion is placed in the output serial register ...

Page 22

... AD7799, which is equivalent to 25.5 bits effective resolution bits peak-to-peak resolution when V The AD7798/AD7799 can be programmed to have a gain 16, 32, 64, or 128 using Bit G2 to Bit G0 in the configuration register. Therefore, with a 2.5 V reference, the unipolar ranges are from ( 19.53 mV 2.5 V), and the bipolar ranges are from ± ...

Page 23

... REFIN(–) inputs are open circuit, the AD7798/AD7799 detect that there is no longer a valid reference. In this case, the NOREF bit of the status register is set the AD7798/AD7799 are performing normal conversions and the NOREF bit becomes active, the conversion results revert to all 1s. Therefore not necessary to continuously monitor the status of the NOREF bit when performing conversions ...

Page 24

... MD0 bits in the mode register. After the calibration is complete, the contents of the corresponding calibration registers are updated, the RDY bit in the status register is set, the DOUT/ RDY pin goes low ( low), and the AD7798/AD7799 revert to idle mode. During an internal zero-scale or full-scale calibration, the respective zero-scale and full-scale input are automatically connected internally to the ADC input pins ...

Page 25

... The ground planes should be allowed to run under the AD7798/ AD7799 to prevent noise coupling. The power supply lines to the AD7798/AD7799 should use as wide a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals, such as clock ...

Page 26

... WEIGH SCALES Figure 19 shows the AD7798/AD7799 being used in a weigh scale application. The load cell is arranged in a bridge network and gives a differential output voltage between its OUT+ and OUT– terminals. Assuming excitation voltage, the full- scale output range from the transducer when the sensitivity is 2 mV/V ...

Page 27

... AD7798BRUZ –40°C to +105°C 1 AD7798BRUZ-REEL –40°C to +105°C EVAL-AD7798EB AD7799BRU –40°C to +105°C AD7799BRU-REEL –40°C to +105°C 1 AD7799BRUZ –40°C to +105°C 1 AD7799BRUZ-REEL –40°C to +105°C EVAL-AD7799EB RoHS Compliant Part. 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1.20 MAX ...

Page 28

... AD7798/AD7799 NOTES ©2005–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04856-0-3/07(A) Rev Page ...

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