AD7450A Analog Devices, AD7450A Datasheet - Page 10

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AD7450A

Manufacturer Part Number
AD7450A
Description
Differential Input, 1 MSPS, 12- (AD7450A) & 10-Bit (AD7440) ADCs
Manufacturer
Analog Devices
Datasheet

Specifications of AD7450A

Resolution (bits)
12bit
# Chan
1
Sample Rate
1MSPS
Interface
Ser
Analog Input Type
Diff-Uni
Ain Range
(2Vref) p-p
Adc Architecture
SAR
Pkg Type
SOP,SOT

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AD7440/AD7450A
TERMINOLOGY
Signal-to-(Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the sum of all nonfundamental signals
up to half the sampling frequency (f
ratio is dependent on the number of quantization levels in the
digitization process; the more levels, the smaller the quanti-
zation noise. The theoretical signal-to-(noise + distortion) ratio
for an ideal N-bit converter with a sine wave input is given by
the following:
Thus for a 12-bit converter, this is 74 dB; and for a 10-bit
converter, this is 62 dB.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of harmonics to the
fundamental. For the AD7440/AD7450A, it is defined as
where V
V
harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic (spurious noise) is the ratio of the rms value of
the next largest component in the ADC output spectrum (up to
f
Normally, the value of this specification is determined by the
largest harmonic in the spectrum, but for ADCs where the
harmonics are buried in the noise floor, it is a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies,
fa and fb, any active device with nonlinearities creates distortion
products at the sum and difference frequencies of mfa ± nfb where
m, n = 0, 1, 2, 3, and so on. Intermodulation distortion terms are
those for which neither m nor n is equal to 0. For example, the
second-order terms include (fa + fb) and (fa – fb), while the third-
order terms include (2fa + fb), (2fa – fb),
(fa + 2fb), and (fa – 2fb).
The AD7440/AD7450A is tested using the CCIF standard of two
input frequencies near the top end of the input bandwidth. In this
case, the second-order terms are distanced in frequency from the
original sine waves, while the third-order terms are at a frequency
close to the input frequencies. As a result, the second- and third-
order terms are specified separately. The calculation of the
intermodulation distortion is as per the THD specification, where it
is the ratio of the rms sum of the individual distortion products to
the rms amplitude of the sum of the fundamentals, expressed in dB.
S
/2 and excluding dc) to the rms value of the fundamental.
4
, V
Signal-to-(Noise + Distortion) = (6.02N + 1.76)dB.
THD
5
, and V
1
is the rms amplitude of the fundamental and V
(
dB
6
)
are the rms amplitudes of the second to the sixth
=
20
log
V
2
2
+
V
3
2
+
S
/2), excluding dc. The
V
V
4
1
2
+
V
5
2
+
V
6
2
2
, V
3,
Rev. C | Page 10 of 28
Aperture Delay
This is the amount of time from the leading edge of the
sampling clock until the ADC actually takes the sample.
Aperture Jitter
This is the sample-to-sample variation in the effective point in
time at which the actual sample is taken.
Full Power Bandwidth
The full power bandwidth of an ADC is the input frequency at
which the amplitude of the reconstructed fundamental is
reduced by 0.1 dB or 3 dB for a full-scale input.
Common-Mode Rejection Ratio (CMRR)
The common-mode rejection ratio is the ratio of the power
in the ADC output at full-scale frequency, f, to the power of a
100 mV p-p sine wave applied to the common-mode voltage of
V
Pf is the power at the frequency f in the ADC output; Pfs is the
power at frequency f
Integral Nonlinearity (INL)
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function.
Differential Nonlinearity (DNL)
This is the difference between the measured and the ideal
1 LSB change between any two adjacent codes in the ADC.
Zero-Code Error
This is the deviation of the midscale code transition
(111...111 to 000...000) from the ideal V
Positive Gain Error
This is the deviation of the last code transition (011...110 to
011...111) from the ideal V
the zero code error has been adjusted out.
Negative Gain Error
This is the deviation of the first code transition (100...000 to
100...001) from the ideal VIN+ − VIN– (i.e., –VREF + 1 LSB),
after the zero code error has been adjusted out.
Track-and-Hold Acquisition Time
The track-and-hold acquisition time is the minimum time
required for the track-and-hold amplifier to remain in track
mode for its output to reach and settle to within 0.5 LSB of the
applied input signal.
IN+
and V
CMRR (dB) = 10 log (Pf/Pfs)
IN–
of frequency f
S
in the ADC output.
IN+
S
as follows:
– V
IN–
(i.e., +V
IN+
− V
REF
IN–
− 1 LSB), after
(i.e., 0 LSB).

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