AD7457 Analog Devices, AD7457 Datasheet

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AD7457

Manufacturer Part Number
AD7457
Description
Pseudo Differential Input, 100 kSPS, 12-Bit ADC in 8-Lead SOT-23
Manufacturer
Analog Devices
Datasheet

Specifications of AD7457

Resolution (bits)
12bit
# Chan
1
Sample Rate
100kSPS
Interface
Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(Vref) p-p
Adc Architecture
SAR
Pkg Type
SOT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7457BRTZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
FEATURES
Specified for V
Low power:
Pseudo differential analog input
Wide input bandwidth:
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface—SPI®-/QSPI™-/
Automatic power-down mode
8-lead SOT-23 package
APPLICATIONS
Transducer interface
Battery-powered systems
Data acquisition systems
Portable instrumentation
GENERAL DESCRIPTION
The AD7457 is a 12-bit, low power, successive approximation
(SAR) analog-to-digital converter that features a pseudo
differential analog input. This part operates from a single 2.7 V
to 5.25 V power supply and features throughput rates of up to
100 kSPS.
The part contains a low noise, wide bandwidth, differential
track-and-hold (T/H) amplifier that can handle input frequen-
cies in excess of 1 MHz. The reference voltage for the AD7457 is
applied externally to the V
V
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the device to interface
with microprocessors or DSPs. The SAR architecture of this
part ensures that there are no pipeline delays.
The AD7457 uses advanced design techniques to achieve very
low power dissipation.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
DD
0.9 mW max at 100 kSPS with V
3 mW max at 100 kSPS with V
70 dB SINAD at 30 kHz input frequency
MICROWIRE™-/DSP-compatible
, depending on what suits the application.
DD
of 2.7 V to 5.25 V
REF
pin and can range from 100 mV to
DD
DD
= 5 V
= 3 V
Low Power, Pseudo Differential, 100 kSPS
12-Bit ADC in an 8-Lead SOT-23
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
6.
7.
8.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
V
V
V
REF
Operation with 2.7 V to 5.25 V power supplies.
Low power consumption. With a 3 V supply, the AD7457
offers 0.9 mW maximum power consumption for a
100 kSPS throughput rate.
Pseudo differential analog input.
Flexible power/serial clock speed management. The
conversion rate is determined by the serial clock, allowing
the power to be reduced as the conversion time is reduced
through the serial clock speed increase. Automatic power-
down after conversion allows the average power consump-
tion to be reduced.
Variable voltage reference input.
No pipeline delays.
Accurate control of the sampling instant via the CS input
and once-off conversion control.
ENOB > 10 bits typically with 500 mV reference.
IN+
IN –
FUNCTIONAL BLOCK DIAGRAM
GND
V
AD7457
DD
T/H
© 2005 Analog Devices, Inc. All rights reserved.
Figure 1.
APPROXIMATION
CONTROL LOGIC
SUCCESSIVE
12-BIT
ADC
www.analog.com
AD7457
SCLK
SDATA
CS

Related parts for AD7457

AD7457 Summary of contents

Page 1

... V power supply and features throughput rates 100 kSPS. The part contains a low noise, wide bandwidth, differential track-and-hold (T/H) amplifier that can handle input frequen- cies in excess of 1 MHz. The reference voltage for the AD7457 is applied externally to the V pin and can range from 100 mV to REF V , depending on what suits the application ...

Page 2

... AD7457 TABLE OF CONTENTS Specifications..................................................................................... 3 Timing Specifications....................................................................... 5 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 Terminology .................................................................................... 10 Theory of Operation ...................................................................... 11 Circuit Information.................................................................... 11 Converter Operation.................................................................. 11 ADC Transfer Function............................................................. 11 Typical Connection Diagram ................................................... 11 REVISION HISTORY 2/05—Rev Rev. A Changes to Table 3............................................................................ 6 Changes to Ordering Guide .......................................................... 17 10/03— ...

Page 3

... 200 µA 2.8 2.4 0.4 ±1 10 Straight natural binary 16 1 100 AD7457 Unit dB min dB min dB max dB max dB typ dB typ ns typ ps typ MHz typ MHz typ Bits LSB max LSB max LSB max LSB max µA max ...

Page 4

... Analog inputs with slew rates exceeding 27 V/µs (full-scale input sine wave > 3.5 MHz) within the acquisition time may cause an incorrect result to be returned by the converter input is applied provide a pseudo ground for V IN– 5 The AD7457 is functional with a reference input range of 100 Guaranteed by characterization. 7 See the Power Consumption section. ...

Page 5

... DB11 DB10 DB2 4 LEADING ZEROS Figure 2. AD7457 Serial Interface Timing Diagram Rev Page unless otherwise noted. MAX ) and timed from a voltage level and the time required for the output to DD Figure 3. The measured number is then extrapolated ...

Page 6

... AD7457 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter V to GND GND IN GND IN– Digital Input Voltage to GND Digital Output Voltage to GND V to GND REF Input Current to Any Pin Except Supplies Operating Temperature Range Commercial (B Version) Storage Temperature Range Junction Temperature θ ...

Page 7

... Serial Data. Logic output. The conversion result from the AD7457 is provided on this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream of the AD7457 consists of four leading zeros followed by the 12 bits of conversion data that are provided MSB first. The output coding is straight (natural) binary ...

Page 8

... CODE Figure 8. Typical DNL for the AD7457 for V 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 1024 2048 3072 CODE Figure 9. Typical INL for the AD7457 for V 9949 CODES 9,000 8,000 7,000 6,000 5,000 4,000 3,000 2,000 1,000 27 CODES 24 CODES 0 2046 2047 2048 ...

Page 9

... POSITIVE INL 0 NEGATIVE INL – 1 – 0.5 1.0 1.5 2.0 2.5 V (V) REF Figure 12. Change in INL vs. V for V REF 3.0 3 3.0 3 Rev Page AD7457 0.5 1.0 1.5 2.0 2.5 3.0 V (V) REF Figure 13. ENOB vs. V for and 5 V REF DD 3.5 ...

Page 10

... The AD7457 is tested using the CCIF standard, where two input frequencies near the top end of the input bandwidth are used. In this case, the second order terms are usually distanced in fre- quency from the original sine waves, while the third order terms are usually at a frequency close to the input frequencies ...

Page 11

... THEORY OF OPERATION CIRCUIT INFORMATION The AD7457 is a 12-bit, low power, single supply, successive approximation analog-to-digital converter (ADC) with a pseudo differential analog input. It operates with a single 2 5.25 V power supply and is capable of throughput rates up to 100 kSPS. It requires an external reference to be applied to the V pin ...

Page 12

... SUPPLY 10µF Figure 19 shows the equivalent circuit of the analog input SERIAL structure of the AD7457. The four diodes provide ESD protec- INTERFACE tion for the analog inputs. Care must be taken to ensure that the SCLK analog input signals never exceed the supply rails by more than µ ...

Page 13

... The falling edge of CS powers up the AD7457 and also puts the track-and-hold into track. Power-up time is 1 µs minimum and, in this time, the device also acquires the analog input signal. CS must remain low for the duration of power-up. The rising edge of CS initiates the conversion process, puts the track-and-hold into hold mode, and takes the serial data bus out of three-state ...

Page 14

... The ADSP-218x family of DSPs can be interfaced directly to the vs. SCLK DD AD7457 without any glue logic. The serial clock for the ADC is provided by the DSP. SDATA from the ADC is connected to the data receive (DR) input of the serial port and CS can be con- trolled by a flag (FL0). The connection diagram is shown 25° ...

Page 15

... Not used SPORT0 is configured by setting the bits in its control register, as listed in Table 5. The flag to generate the CS signal is generated by SPORT1 connected to both the ADC and the RFS input of SPORT0 to provide the frame sync signal for the DSP. Rev Page AD7457 ...

Page 16

... The analog ground plane should be allowed to run under the AD7457 to avoid noise coupling. The power supply lines to the AD7457 should use as large a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals, ...

Page 17

... COMPLIANT TO JEDEC STANDARDS MO-178BA Figure 26. 8-Lead Small Outline Transistor Package [SOT-23] (RT-8) Dimensions shown in millimeters 1 Linearity Error (LSB) ±1 ±1 ±1 Rev Page 0.60 8° 0.45 4° 0.30 0° Package Description Package Option 8-Lead SOT-23 RT-8 8-Lead SOT-23 RT-8 8-Lead SOT-23 RT-8 AD7457 Branding COJ COJ COD ...

Page 18

... AD7457 NOTES Rev Page ...

Page 19

... NOTES Rev Page AD7457 ...

Page 20

... AD7457 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03157–0–2/05(A) Rev Page ...

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