AD7475 Analog Devices, AD7475 Datasheet
AD7475
Specifications of AD7475
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AD7475 Summary of contents
Page 1
... There are no pipeline delays associated with the part. The AD7475/AD7495 use advanced design techniques to achieve very low power dissipation at high throughput rates. With 3 V supplies and a 1 MSPS throughput rate, the AD7475 consumes just 1.5 mA, while the AD7495 consumes 2 mA. With 5 V supplies and 1 MSPS, the current consumption is 2 ...
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... Updated Outline Dimensions ....................................................... 23 Changes to Ordering Guide .......................................................... 24 Operating Modes............................................................................ 16 Normal Mode.............................................................................. 16 Partial Power-Down Mode ....................................................... 16 Full Power-Down Mode ............................................................ 17 Power vs. Throughput Rate....................................................... 19 Serial Interface ................................................................................ 20 Microprocessor Interfacing........................................................... 21 AD7475/AD7495 to TMS320C5 AD7475/AD7495 to ADSP-21 AD7475/AD7495 to DSP56 AD7475/AD7495 to MC68HC16............................................. 22 Outline Dimensions ....................................................................... 23 Ordering Guide .......................................................................... 24 Rev Page /C54 ................................. ............................................. 21 XX ............................................... 22 XXX ...
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... AD7475 SPECIFICATIONS 5.25 V, REF DRIVE Table 1. Parameter DYNAMIC PERFORMANCE Signal-to-Noise and Distortion Ratio (SINAD) Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD) Second-Order Terms Third-Order Terms Aperture Delay Aperture Jitter Full Power Bandwidth ...
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... AD7475/AD7495 Parameter POWER REQUIREMENTS DRIVE Normal Mode (Static) Normal Mode (Operational) Partial Power-Down Mode Partial Power-Down Mode Full Power-Down Mode Power Dissipation Normal Mode (Operational) Partial Power-Down (Static) Full Power-Down 1 Temperature ranges for A, B versions: −40°C to +85°C. ...
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... Straight (Natural) Binary 800 800 ns max 300 300 ns max 325 325 ns max 1 1 MSPS max Rev Page AD7475/AD7495 Test Conditions/Comments f = 300 kHz sine wave MSPS IN SAMPLE f = 300 kHz sine wave MSPS IN SAMPLE f = 300 kHz sine wave MSPS ...
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... AD7475/AD7495 Parameter POWER REQUIREMENTS DRIVE I DD Normal Mode (Static) Normal Mode (Operational) Partial Power-Down Mode Partial Power-Down Mode Full Power-Down Mode 3 Power Dissipation Normal Mode (Operational) Partial Power-Down (Static) Full Power-Down 1 Temperature ranges for A, B versions: −40°C to +85°C. ...
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... TIMING SPECIFICATIONS 5.25 V, REF IN = 2.5 V (AD7475 DRIVE Table 3. Parameter Limit MIN SCLK × t CONVERT SCLK 800 t 100 QUIET 0 SCLK t 0 SCLK POWER-UP ...
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... AD7475/AD7495 TIMING EXAMPLE 1 With MHz and a throughput of 1 MSPS, the cycle SCLK time 12.5(1 μs. With t 2 SCLK ACQ is 365 ns. The 365 ns satisfies the requirement of 300 ns for t In Figure 3, t comprises 2.5(1 ACQ SCLK 45 ns. This allows a value of 195 ns for t minimum requirement of 100 ns ...
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... 0.3 V device reliability. DD −0 0.3 V DRIVE −0 0 ±10 mA −40°C to +85°C −65°C to +150°C 150°C 450 mW 157°C/W (SOIC) 205.9°C/W (MSOP) 56°C/W (SOIC) 43.74°C/W (MSOP) 215°C 220° Rev Page AD7475/AD7495 ...
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... Pin No. Mnemonic Function 1 (AD7475) REF IN Reference Input for the AD7475. An external reference must be applied to this input. The voltage range for the external reference is 2.5 V ± 1% for specified performance. A cap of a least 0.1 μF should be placed on the REF IN pin. 1 (AD7495) REF OUT Reference Output for the AD7495. A minimum 100 nF capacitance is required from this pin to GND. The internal reference can be taken from this pin, but buffering is required before it is applied elsewhere in a system ...
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... The AD7475/AD7495 are tested using the CCIF standard where two input frequencies near the top end of the input bandwidth are used. In this case, the second-order terms are usually ...
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... AD7475/AD7495 TYPICAL PERFORMANCE CURVES Figure 7 shows a typical FFT plot for the AD7475 MHz sample rate and a 100 kHz input frequency. –15 –35 –55 –75 –95 –115 0 50 100 150 200 250 300 FREQUENCY (kHz) Figure 7. AD7475 Dynamic Performance Figure 8 shows a typical FFT plot for the AD7495 MHz sample rate and a 100 kHz input frequency. – ...
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... V reference. The serial clock input accesses data from the part but also provides the clock source for the successive-approximation ADC. The analog input range REF IN for the AD7475 and REF OUT for the AD7495. The AD7475/AD7495 also feature power-down options to allow power saving between conversions ...
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... AD7475 and AD7495, respectively. In both setups the GND pin is connected to the analog ground plane of the system. In Figure 13, REF IN is connected to a decoupled 2.5 V supply from a reference source, the AD780, to provide an analog input range 2.5 V. Although the AD7475 is connected the serial interface is connected micro- DD processor ...
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... V. (See the Absolute Maximum Ratings section.) IN Reference Section An external reference source should be used to supply the 2.5 V reference to the AD7475. Errors in the reference source result in gain errors in the AD7475 transfer function and add the specified full-scale errors on the part. The AD7475 voltage f = 100kHz IN reference input, REF IN, has a dynamic input impedance ...
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... This mode is intended for fastest throughput rate performance, because the user does not have to worry about any power-up times with the AD7475/AD7495 remaining fully powered all the time. Figure 19 shows the general diagram of the AD7475/ AD7495 operating in this mode. The conversion is initiated on the falling edge described in the Serial Interface section ...
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... QUIET, goes back into three-state after the dummy conversion to the next falling edge When running MSPS throughput rate, the AD7475/AD7495 power up and acquire a signal within ±0.5 LSB in one dummy cycle, 1 μs. THE PART BEGINS TO POWER UP ...
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... For the AD7495, enough time should be allowed for the internal reference buffer to charge the reference capacitor. Then, to place the AD7475/ AD7495 in normal mode, a dummy cycle, 1 μs, should be initiated. If the first valid conversion is then performed directly after the dummy conversion, ensure that adequate acquisition time has been allowed ...
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... V and 3 V supplies for both the AD7475 and AD7495. For the AD7475, partial power- down current is lower than that of the AD7495. Full power-down mode is intended for use in applications with ...
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... THREE-STATE FOUR LEADING ZEROS Sixteen serial clock cycles are required to perform the con- version process and to access data from the AD7475/AD7495. CS going low provides the first leading zero to be read in by the microcontroller or DSP. The remaining data is then clocked out by subsequent SCLK falling edges beginning with the second leading zero ...
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... AD7475/AD7495 TO ADSP-21 The ADSP-21xx family of DSPs is interfaced directly to the AD7475/AD7495 without any glue logic required. The V pin of the AD7475/AD7495 takes the same supply voltage as that of the ADSP-21xx. This allows the ADC to operate at a higher voltage than the serial interface, that is, ADSP-21xx, if ...
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... SCLKs between interrupts is a whole integer figure of N, equidistant sampling is implemented by the DSP. AD7475/AD7495 TO DSP56 XXX The connection diagram in Figure 30 shows how the AD7475/ AD7495 can be connected to the synchronous serial interface (SSI) of the DSP56xxx family of devices from Motorola. The SSI is operated in synchronous mode (SYN bit in CRB = 1) with internally generated 1-bit clock period frame sync for both Tx and Rx (Bits FSL1 = 1 and FSL0 = 0 in CRB) ...
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... Dimensions shown in millimeters and (inches) 3.00 BSC 8 5 3.00 4.90 BSC BSC 1 4 PIN 1 0.65 BSC 1.10 MAX 0.15 0.00 0.38 0.23 0.22 0.08 COPLANARITY SEATING 0.10 PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 33. 8-Lead Mini Small Outline Package [MINI_SO] (RM-8) Dimensions shown in millimeters Rev Page AD7475/AD7495 0.50 (0.0196) × 45° 0.25 (0.0099) 8° 1.27 (0.0500) 0° 0.40 (0.0157) 0.80 8° 0.60 0° 0.40 ...
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... AD7475ARM −40°C to +85°C AD7475ARM-REEL −40°C to +85°C AD7475ARM-REEL7 −40°C to +85°C AD7475BRM −40°C to +85°C AD7475BRM-REEL −40°C to +85°C AD7475BRM-REEL7 −40°C to +85°C 3 AD7475BRMZ −40°C to +85°C 3 AD7475BRMZ-REEL −40°C to +85°C 3 AD7475BRMZ-REEL7 − ...