AD7664 Analog Devices, AD7664 Datasheet

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AD7664

Manufacturer Part Number
AD7664
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD7664

Resolution (bits)
16bit
# Chan
1
Sample Rate
570kSPS
Interface
Par,Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(Vref) p-p,Uni (Vref)
Adc Architecture
SAR
Pkg Type
CSP,QFP

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a
GENERAL DESCRIPTION
The AD7664 is a 16-bit, 570 kSPS, charge redistribution SAR,
analog-to-digital converter that operates from a single 5 V power
supply. The part contains a high speed 16-bit sampling ADC,
an internal conversion clock, error correction circuits, and both
serial and parallel system interface ports.
The AD7664 is hardware factory-calibrated and is comprehensively
tested to ensure such ac parameters as signal-to-noise ratio (SNR)
and total harmonic distortion (THD), in addition to the more
traditional dc parameters of gain, offset, and linearity.
It features a very high sampling rate mode (Warp), a fast mode
(Normal) for asynchronous conversion rate applications, and for
low power applications, a reduced power mode (Impulse) where
the power is scaled with the throughput.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
FEATURES
Throughput:
INL:
16-Bit Resolution with No Missing Codes
S/(N+D): 90 dB Typ @ 45 kHz
THD: –100 dB Typ @ 45 kHz
Analog Input Voltage Range: 0 V to 2.5 V
Both AC and DC Specifications
No Pipeline Delay
Parallel and Serial 5 V/3 V Interface
SPI
Single 5 V Supply Operation
Power Dissipation
Power-Down Mode: 7 W Max
Package: 48-Lead Quad Flat Pack (LQFP)
Pin-to-Pin Compatible Upgrade of the AD7660
APPLICATIONS
Data Acquisition
Instrumentation
Digital Signal Processing
Spectrum Analysis
Medical Instruments
Battery-Powered Systems
Process Control
570 kSPS (Warp Mode)
500 kSPS (Normal Mode)
444 kSPS (Impulse Mode)
115 mW Maximum,
21 W @ 100 SPS
48-Lead Chip Scale Package (LFCSP)
®
/QSPI
2.5 LSB Max ( 0.0038% of Full Scale)
TM
/MICROWIRE
TM
/DSP Compatible
Type/kSPS
Pseudo
Differential
True Bipolar
True
Differential
18-Bit
Simultaneous/
Multichannel
It is fabricated using Analog Devices’ high performance, 0.6 micron
CMOS process, with correspondingly low cost and is available in a
48-lead LQFP and a tiny 48-lead LFCSP with operation specified
from –40°C to +85°C.
PRODUCT HIGHLIGHTS
1. Fast Throughput
2. Superior INL
3. Single-Supply Operation
4. Serial or Parallel Interface
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
RESET
INGND
The AD7664 is a 570 kSPS, charge redistribution, 16-bit
SAR ADC with internal error correction circuitry.
The AD7664 has a maximum integral nonlinearity of 2.5 LSBs
with no missing 16-bit code.
The AD7664 operates from a single 5 V supply and dissipates
only a maximum of 115 mW. In Impulse Mode, its power
dissipation decreases with the throughput to, for instance, only
21 µW at a 100 SPS throughput. It consumes 7 µW maximum
when in power-down.
Versatile parallel or 2-wire serial interface arrangement
compatible with both 3 V or 5 V logic.
PD
IN
PulSAR
AVDD AGND REF REFGND
WARP
FUNCTIONAL BLOCK DIAGRAM
CALIBRATION CIRCUITRY
CONTROL LOGIC AND
100–250
AD7651
AD7660/AD7661 AD7664/AD7666 AD7667
AD7663
AD7675
AD7678
IMPULSE
Table I. PulSAR Selection
SWITCHED
CAP DAC
© 2004 Analog Devices, Inc. All rights reserved.
®
Unipolar CMOS ADC
CNVST
CLOCK
AD7664
16-Bit, 570 kSPS
500–570
AD7650/AD7652 AD7653
AD7665
AD7676
AD7679
AD7654
AD7655
INTERFACE
PARALLEL
DVDD
SERIAL
AD7664
PORT
DGND
www.analog.com
16
OVDD
OGND
D[15:0]
BUSY
RD
CS
SER/PAR
OB/2C
800–1000
AD7671
AD7677
AD7674
*

Related parts for AD7664

AD7664 Summary of contents

Page 1

... The AD7664 has a maximum integral nonlinearity of 2.5 LSBs with no missing 16-bit code. 3. Single-Supply Operation The AD7664 operates from a single 5 V supply and dissipates only a maximum of 115 mW. In Impulse Mode, its power dissipation decreases with the throughput to, for instance, only 21 µ 100 SPS throughput. It consumes 7 µW maximum when in power-down ...

Page 2

... AD7664 –SPECIFICATIONS Parameter RESOLUTION ANALOG INPUT Voltage Range Operating Input Voltage Analog Input CMRR Input Current Input Impedance THROUGHPUT SPEED Complete Cycle Throughput Rate Time between Conversions Complete Cycle Throughput Rate Complete Cycle Throughput Rate DC ACCURACY Integral Linearity Error Differential Linearity Error ...

Page 3

... L –3– Typ Max +85 Typ Max Note 1 25 1.5/1.75/2 2 1.5/1.75/2 1.5/1.75 25/275/525 2.75/3/3.25 1/1.25/1 pF; otherwise, the load maximum. AD7664 Unit °C Unit ns µs ns µ µ µ µs µ ...

Page 4

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7664 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 5

... IDENTIFIER NC 3 DGND 4 OB/2C 5 AD7664 WARP 6 TOP VIEW IMPULSE 7 (Not to Scale) SER/PAR PIN FUNCTION DESCRIPTIONS –5– AD7664 36 AGND CNVST RESET DGND 29 BUSY 28 D15 27 D14 26 D13 25 D12 ...

Page 6

... Chip Select. When CS and RD are both LOW, the interface parallel or serial output bus is enabled also used to gate the external clock. Reset Input. When set to a logic HIGH, reset the AD7664. Current conversion if any is aborted. If not used, this pin could be tied to DGND. ...

Page 7

... CNVST input to when the input signal is held for a conversion. Transient Response The time required for the AD7664 to achieve its rated accuracy after a full-scale step function is applied to its input. Overvoltage Recovery The time required for the ADC to recover to full accuracy after an analog input signal 150% of full-scale is reduced to 50% of the full-scale value ...

Page 8

... Performance Characteristics AD7664 2.5 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 0 16384 32768 CODE TPC 1. Integral Nonlinearity vs. Code 8000 7288 7148 7000 6000 5000 4000 3000 2000 753 1000 7F86 7F87 7F88 7F89 7F8A 7F8B CODE – Hexa TPC 2. Histogram of 16,384 Conversions Input ...

Page 9

... DVDD, WARP/NORMAL 1k 95 100 0 0.001 1000 0.1 1 TPC 12. Operating Currents vs. Sample Rate –9– AD7664 SNR S/(N+D) –40 –30 –20 –10 0 INPUT LEVEL – dB –96 –98 THD –100 SNR –102 –104 – 105 125 TEMPERATURE – ...

Page 10

... AD7664 10 8 FULL-SCALE ERROR –2 –4 –6 –8 –10 –55 –35 – TEMPERATURE ( C) TPC 13. Zero Error, Full-Scale Error vs. Temperature 50 OVDD = 2.7V OVDD = 5V 100 C – TPC 14. Typical Delay vs. Load Capacitance C 100 ZERO ERROR ...

Page 11

... ADC that does not exhibit any pipeline or latency, making it ideal for multiple multiplexed channel applications. The AD7664 can be operated from a single 5 V supply and interfaced to either digital logic housed in a 48-lead LQFP package or a 48-lead LFCSP package that saves space and allows flexible configurations as either a serial or parallel interface ...

Page 12

... Using the OB/2C digital input, the AD7664 offers two output codings: straight binary and twos complement. The LSB size is /65536, which is about 38.15 µV. The ideal transfer charac- V REF teristics for the AD7664 are shown in Figure 4 and Table II. 1 LSB = V /65536 REF 111...111 111 ...

Page 13

... Figure 8. THD vs. Analog Input Frequency and Source Resistance Driver Amplifier Choice Although the AD7664 is easy to drive, the driver amplifier needs to meet at least the following requirements: • The driver amplifier and the AD7664 analog input circuit must be able, together, to settle for a full-scale step of the capacitor array at a 16-bit level (0.0015%). In the amplifier’ ...

Page 14

... The AD780 can be selected with reference voltage. Power Supply The AD7664 uses three sets of power supply pins: an analog 5 V supply AVDD, a digital 5 V core supply DVDD, and a digital input/output interface supply OVDD. The OVDD supply allows direct interface with any logic working between 2 ...

Page 15

... The serial interface is multiplexed on the parallel databus. The AD7664 digital interface also accommodates both logic by simply connecting the OVDD supply pin of the AD7664 to the host system interface digital supply. Finally, by using the OB/2C input pin, either twos complement or straight binary coding can be used ...

Page 16

... Internal Clock The AD7664 is configured to generate and provide the serial data clock SCLK when the EXT/INT pin is held LOW. The AD7664 also generates a SYNC signal to indicate to the host when the serial data is valid. The serial clock SCLK and the SYNC signal can be inverted, if desired ...

Page 17

... Figure 18. Slave Serial Data Timing for Reading (Read after Convert) Because the AD7664 is used with a fast throughput, the Mas- ter Read During Conversion Mode is the most often recom- mended Serial Mode, when it can be used. In this mode, the serial clock and data toggle at appropriate instants that mini- mize potential feedthrough between digital activity and the critical conversion decisions ...

Page 18

... Figure 21 shows an interface diagram between the AD7664 and an SPI-equipped ADSP-219x. To accommodate the slower speed of the DSP, the AD7664 acts as a slave device and data must be read after conversion. This mode also allows the daisy-chain feature. The convert command can be initiated in response to an internal timer interrupt ...

Page 19

... It is recommended to avoid running digital lines under the device, because these couple noise onto the die. The analog ground plane should be allowed to run under the AD7664 to avoid noise coupling. Fast switching signals like CNVST or clocks should be shielded with digital ground to avoid radiating noise to other sections of the board and should never run near analog signal paths ...

Page 20

... AD7664 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE ROTATED 90 CCW 7.00 BSC SQ PIN 1 INDICATOR TOP VIEW 1.00 12 MAX 0.85 0.80 SEATING PLANE OUTLINE DIMENSIONS 48-Lead Low Profile Quad Flat Package [LQFP] (ST-48) Dimensions shown in millimeters 0.75 1.60 0.60 MAX 0.45 1 SEATING PLANE 10 6 0.20 2 0.09 VIEW 0.08 MAX 0.50 COPLANARITY BSC VIEW A COMPLIANT TO JEDEC STANDARDS MS-026BBC 48-Lead Lead Frame Chip Scale Package [LFCSP] ...

Page 21

... Changes to Table III . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Added CP- Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 11/01—Data Sheet changed from REV REV. C. Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 TPC 12 replaced with new data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Edits to Voltage Reference Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Edits to OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8/01 Revision History continued on next page REV. E –21– AD7664 Page ...

Page 22

... AD7664 Revision History Location 8/01—Data Sheet changed from REV REV. B. Edit to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edit to PRODUCT HIGHLIGHTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edit to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Edit to Timing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Edit to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edit to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edit to PIN FUNCTION DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Edits to TPC Edits to TPCs Edit to Figure Edit to Driver Amplifier Choice section ...

Page 23

–23– ...

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–24– ...

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