AD7724 Analog Devices, AD7724 Datasheet

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AD7724

Manufacturer Part Number
AD7724
Description
Dual, 7th-Order, Sigma-Delta Modulator
Manufacturer
Analog Devices
Datasheet

Specifications of AD7724

Resolution (bits)
15bit
# Chan
2
Sample Rate
30MSPS
Interface
Ser
Analog Input Type
Diff-Bip,Diff-Uni
Ain Range
2.5V p-p,Uni 2.5V
Adc Architecture
Sigma-Delta Modulator
Pkg Type
QFP

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a
GENERAL DESCRIPTION
This device consists of two seventh order sigma-delta modula-
tors. Each modulator converts its analog input signal into a high
speed 1-bit data stream. The part operates from a 5 V power
supply and accepts a differential input range of 0 V to +2.5 V or
±1.25 V centered about a common-mode bias. The analog inputs
are continuously sampled by the analog modulators, eliminating
the need for external sample-and-hold circuitry. The input
information is contained in the output stream as a density of
ones. The original information can be digitally reconstructed
with an appropriate digital filter.
The part provides an accurate on-chip 2.5 V reference for each
modulator. A reference input/output function is provided to
allow either the internal reference or an external system refer-
ence to be used as the reference source for the modulator.
The device is offered in a 48-lead LQFP package and designed
to operate from –40°C to +85°C.
AVIN(+)
AVIN(–)
BVIN(+)
BVIN(–)
MZERO
RESET
STBY
BIP
GC
Dual CMOS - Modulators
REFERENCE
DVDD
2.5V
FUNCTIONAL BLOCK DIAGRAM
DVDD1
REF1 REF2A
CONTROL
MODULATOR A
MODULATOR B
LOGIC
DGND
-
-
REF2B
AVDD
CIRCUITRY
AD7724
CLOCK
AGND
AD7724
ADATA
SCLK
BDATA
XTAL OFF
XTAL1
XTAL2/MCLK
DVAL

Related parts for AD7724

AD7724 Summary of contents

Page 1

... Dual CMOS - Modulators FUNCTIONAL BLOCK DIAGRAM REF1 REF2A REF2B 2.5V REFERENCE AVIN(+) - MODULATOR A AVIN(–) BVIN(+) - MODULATOR B BVIN(–) MZERO GC CONTROL BIP LOGIC STBY RESET DVDD DVDD1 DGND AVDD AD7724 AD7724 ADATA SCLK BDATA XTAL OFF XTAL1 CLOCK CIRCUITRY XTAL2/MCLK DVAL AGND ...

Page 2

... AD7724–SPECIFICATIONS MHz ac-coupled sine wave, REF2A = REF2B = 2 MCLK Parameter STATIC PERFORMANCE Integral Nonlinearity Offset Error 2 Gain Error Offset Error Drift Gain Error Drift Unipolar Mode Bipolar Mode ANALOG INPUTS Signal Input Span (VIN(+) – VIN(–)) Bipolar Mode ...

Page 3

... V max |I OUT 4.75/5.25 V min/V max 2.85/5.25 V min/V max Digital Inputs Equal DVDD 60 mA max µA max 20 94.25kHz DECIMATE BY 32 120dB 304.687kHz FILTER 2 BANDWIDTH = 94.25kHz TRANSITION = 108.874kHz ATTENUATION = 90dB COEFFICIENTS = 151 | ≤ 200 µA | ≤ 1.6 mA DECIMATE 16-BIT BY 2 OUTPUT 90dB 108.874kHz AD7724 ...

Page 4

... AD7724 TIMING CHARACTERISTICS Limit at T MIN Parameter (A Version) f 100 MCLK DELAY 0.45 × MCLK 0.45 × MCLK × MCLK – NOTES 1 Sample tested at 25°C to ensure compliance. 2 Guaranteed by design. t SCLK (O) ...

Page 5

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7724 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 6

... compatible. DVAL Data Valid Logic Output. A logic high on DVAL indicates that the data bit stream from the AD7724 is an accurate digital representation of the analog voltage at the input to the sigma-delta modulator. The DVAL pin is set low for 20 MCLK cycles if the analog input is overranged. ...

Page 7

... TERMINOLOGY (IDEAL FIR FILTER USED WITH AD7724 [FIGURE 1]) Integral Nonlinearity This is the maximum deviation of any code from a straight line passing through the endpoints of the transfer function. The endpoints of the transfer function are zero scale (not to be con- fused with bipolar zero), a point 0.5 LSB below the first code transition (100 ...

Page 8

... AD7724 –Typical Performance Characteristics (AVDD = DVDD = 5 CLKIN = 13 MHz ac-coupled sine wave, AIN = 20 kHz, Bipolar Mode unless otherwise noted) 110 100 90 SFDR 80 S/ (N+ –40 –30 –20 –10 0 INPUT LEVEL – dB –85 –90 SNR V (+) = V (–) = 1.25V p – ...

Page 9

... AIN = 90kHz –20 XTAL = 12.288MHz SNR = 88.1dB –40 S/(N+D) = 88.1dB SFDR = –103.7dB –60 –80 –100 –120 –140 –154 90E+3 96E+3 0E+0 10E+3 20E+3 30E+3 40E+3 50E+3 60E+3 70E+3 80E+3 AD7724 409.0268 FREQUENCY – kHz 90E+3 98E+3 90E+3 96E+3 ...

Page 10

... To remedy the situation, a low-pass RC filter can be connected between the amplifier and the input to the AD7724 as shown in Figure 7. The external capacitor at each input aids in supplying the current spikes created during the sampling process. The resistor in the diagram, as well as ...

Page 11

... If ceramic capacitors are used, they must have NPO dielectric. Applying the Reference The reference circuitry used in the AD7724 includes an on-chip 2.5 V bandgap reference and a reference buffer circuit. The block diagram of the reference circuit is shown in Figure 9. The internal reference voltage is connected to REF1 via a 3 kΩ ...

Page 12

... VIN(+) pins to form a differential signal around an initial bias voltage of 1.25 V. For single-ended applications, best THD performance is obtained with VIN(–) set to 1.25 V rather than 2.5 V. The input to the AD7724 can also be driven differen- tially with a complementary input as shown in Figure 13. In this case, the input common-mode voltage is set to 2.5 V. ...

Page 13

... The analog ground plane should be allowed to run under the AD7724 to avoid noise coupling. The power supply lines to the AD7724 should use as large a trace as pos- sible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals such as ...

Page 14

... AD7724 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 48-Lead Plastic Thin Quad Flatpack (ST-48) 0.063 (1.60) MAX 0.354 (9.00) BSC SQ 0.030 (0.75 0.018 (0.45 SEATING PLANE TOP VIEW (PINS DOWN) 0.006 (0.15 0.002 (0.05 MIN 0.019 (0.5) 0.011 (0.27) 0.007 (0.18) BSC 0.006 (0.17) 0.004 (0.09 0.276 (7.00) BSC SQ 0.057 (1.45) ...

Page 15

... Revision History Location Data Sheet changed from REV REV. B. Additions to TIMING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to Figure Edits to PIN FUNCTION DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 AD7724 Page ...

Page 16

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