AD9203 Analog Devices, AD9203 Datasheet
AD9203
Specifications of AD9203
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AD9203 Summary of contents
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... The AD9203 can operate with a supply range from 2 3 attractive option for low power operation in high-speed portable applications. The AD9203 is specified over industrial (−40°C to +85°C) temperature ranges and is available in a 28-lead TSSOP package ...
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... AD9203 TABLE OF CONTENTS Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Characteristics .............................................................. 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Terminology ...................................................................................... 7 Typical Performance Characteristics ............................................. 8 Operations ....................................................................................... 11 Theory of Operation .................................................................. 11 Operational Modes..................................................................... 11 Input and Reference Overview ................................................. 12 Internal Reference Connection ................................................ 12 External Reference Operation .................................................. 13 Clamp Operation........................................................................ 13 REVISION HISTORY 8/04—Data sheet changed from Rev Rev. B Changes to Table 5.......................................................................... 16 4/01— ...
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... P 0.65 1.2 D PSRR 0.04 ± 0.25 SINAD 59.7 57.2 59.3 ENOB 9.6 9.2 9.55 SNR 60.0 57.5 59.5 THD −76.0 −74.0 −65.0 SFDR 80 67.8 78 Rev Page AD9203 Unit Conditions Bits MSPS Clock Cycles V p rms MHz mV Switched, Single-Ended V REFSENSE = VREF V REFSENSE = GND mV mV 1.0 mA Load 4.8 MHz, Output Bus Load = 10pF IN ...
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... OH High Level Output Voltage (I = 0.5 mA) OH Low Level Output Voltage (I = 1.6 mA) OL Low Level Output Voltage ( µ Differential Input (2 V p-p). 2 The AD9203 will convert at clock rates as low as 20 kHz. ANALOG INPUT CLOCK DATA OUT Symbol Min Typ Max IMD ...
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... AVDD + 0.3 V sections of this specification is not implied. Exposure to AVDD + 0.3 V absolute maximum ratings for extended periods may affect AVDD + 0.3 V device reliability. AVDD + 0.3 V AVDD + 0.3 V AVDD + 0.3 V AVDD + 0.3 V 150 °C +150 °C THERMAL CHARACTERISTICS 28-Lead TSSOP 300 ° 97.9°C 14.0°C/W C Rev Page AD9203 ...
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... Inverting Analog Input. 27 AVSS Analog Ground. 28 AVDD Analog Supply. DRVSS AVDD 1 28 DRVDD AVSS 2 27 (LSB) D0 AINN AINP REFBF 5 24 AD9203 D3 6 VREF 23 TOP VIEW D4 REFTF 7 22 (Not to Scale PWRCON 21 D6 CLAMPIN CLAMP 19 D8 REFSENSE 11 18 ...
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... Pipeline Delay (Latency) The number of clock cycles between conversion initiation and the associated output data being made available. New output data is provided on every rising edge. Rev Page AD9203 ...
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... AD9203 TYPICAL PERFORMANCE CHARACTERISTICS AVDD = 3 V, DRVDD = MSPS Internal Reference, PWRCON = AVDD, 50% Duty Cycle, unless otherwise noted SINGLE-ENDED INPUT 59 2V DIFFERENTIAL INPUT DIFFERENTIAL INPUT SINGLE-ENDED INPUT INPUT FREQUENCY (MHz) Figure 4. SNR vs. Input Frequency and Configuration ...
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... MHz MHz, Sample Rate = 40 MSPS 2 V Differential Input, 8192 Point FFT 2.5 800 900 1024 Rev Page AD9203 100 200 300 400 500 600 700 800 900 Figure 13. Typical DNL Performance SNR = 59.9dB THD = –75dB SFDR = 82dB 2.5E+6 5 ...
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... AD9203 0 –1 –2 –3 –4 –5 –6 –7 –8 –9 10 100 INPUT FREQUENCY (MHz) Figure 16. Full Power Bandwidth 3500 3000 1V REFERENCE 2500 2000 0.5V REFERENCE 1500 1000 500 0 0 200 400 600 OFF-TIME (ms) Figure 17. Wake-Up Time vs. Off Time (VREF Decoupling = 10 µF) 0.2 0.1 0 –0.1 – ...
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... For example p-p signal may be applied to AINP while reference is applied to AINN. The AD9203 will then accept a signal varying between 2 V and 0 V. See Figure 19, Figure 20, and Figure 21 for more details. ...
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... Figure 19 illustrates the input configured with reference. This will set the single-ended input of the AD9203 in the 2 V span (2 × VREF). This example shows the AINN input is tied to the 1 V VREF. This will configure the AD9203 to accept input centered around ...
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... A3 1.5kΩ 0.1µF AVDD Figure 22. External Reference Configuration CLAMP OPERATION The AD9203 contains an internal clamp. It may be used when REFTF 1.875V operating the input in a single-ended mode. This clamp is very 0.1µF useful for clamping NTSC and PAL video signals to ground. ADC The clamp cannot be used in the differential input mode. ...
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... The ac-coupling capacitors integrate the switching transients present at the input of the AD9203 and cause a net dc bias current, IB, to flow into the input. The magnitude of the bias current increases as the signal changes and as the clock frequency increases. This bias current will result in an offset error of (R1 + R2) IB ...
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... T16–6T with an impedance ratio of 16, effectively steps up the signal amplitude, thus further reducing the driving requirements of the signal source. The AD9203 can be easily configured for either p p-p input span by setting the internal reference. Other input spans can be realized with two external gain setting resistors as > ...
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... Each of the AD9203 digital control inputs, 3-STATE, DFS, and STBY are referenced to analog ground. CLK is also referenced to analog ground. A low power mode feature is provided such that for STBY = HIGH and the static power of the AD9203 drops to 0.65 mW. Asserting the DFS pin high will invert the MSB pin, changing the data to a twos complement format ...
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... Figure 32. Output Data Format G1 = 20dB G2 = 20dB SAW FILTER 50Ω OUTPUT 50Ω 200Ω 22.1Ω 93.1Ω Figure 33. Simplified IF Sampling Circuit Rev Page – LSB +FS – 1 LSB AD9203 BANDPASS MINI CIRCUITS FILTER T4-6T 50Ω 1:4 AINP 200Ω AINN AVDD/2 AD9203 +FS ...
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... Only the 2 V span should be used for undersampling beyond 20 MHz. A DNL of ±0.25 LSB combined with low thermal input referred noise allows the AD9203 in the 2 V span to provide > SNR for a baseband input sine wave. Also, its low aperture jitter of 1.2 ps rms ensures minimum SNR degradation at higher IF frequencies ...
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... Figure 36. Ultrasound Connection for the AD9203 Figure 36 illustrates the AD604 variable gain amplifier configured for time gain compensation (TGC). The low power AD9203 is powered from supply rail while the high performance AD604 is powered from 5 V supply rails. An AD8138 is used to drive the AD9203. This is implemented due to the ability of differential drive techniques to cancel common- mode noise and input anomalies ...
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... AD9203 EVALUATION BOARD The AD9203 evaluation board is shipped wired for 2 V differential operation. The board should be connected to power and test equipment as shown in Figure 38 easily configured SYNTHESIZER ANTI- 1MHz 1.9V p-p ALIASING HP8644 FILTER SYNTHESIZER 40MHz 1V p-p HP8644 for single-ended and differential operation as well and 2 V spans ...
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... Figure 39. Evaluation Board (Rev. C) Rev Page AD9203 ...
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... AD9203 Figure 40. Evaluation Board (Rev. C) Rev Page ...
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... Figure 41. Evaluation Board Component Side Assembly (Not to Scale) Figure 42. Evaluation Board Component Side (Not to Scale) Figure 43. Evaluation Board Solder Side Assembly (Not to Scale) Rev Page AD9203 ...
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... AD9203 Figure 44. Evaluation Board Solder Side (Not to Scale) Figure 45. Evaluation Board Ground Plane (Not to Scale) Figure 46. Evaluation Board Power Plane (Not to Scale) Rev Page ...
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... OUTLINE DIMENSIONS PIN 1 0.15 0.05 COPLANARITY ORDERING GUIDE Model Temperature Range AD9203ARU −40°C to +85°C AD9203ARURL7 −40°C to +85°C 1 AD9203ARUZ −40°C to +85°C 1 AD9203ARUZRL7 −40°C to +85°C AD9203- Pb-free part. 9.80 9.70 9. 4.50 4.40 4. 0.65 BSC 1.20 MAX 0.30 0.20 SEATING 0.19 0.09 PLANE 0.10 COMPLIANT TO JEDEC STANDARDS MO-153AE Figure 47 ...
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... AD9203 NOTES Rev Page ...
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... NOTES Rev Page AD9203 ...
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... AD9203 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00573–0–8/04(B) Rev Page ...