AD6640 Analog Devices, AD6640 Datasheet - Page 19

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AD6640

Manufacturer Part Number
AD6640
Description
Multi-Channel, Multi-Mode Receiver Chipset
Manufacturer
Analog Devices
Datasheet

Specifications of AD6640

Resolution (bits)
12bit
# Chan
1
Sample Rate
65MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
2 V p-p
Adc Architecture
Pipelined
Pkg Type
QFP

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REV. A
band-pass filter will remove harmonics generated within the
amplifier, but intermods should be better than the performance
of the A/D converter. In the case of the AD6640, amplifier
intermods must be better than –80 dBFS when driving full-
scale power. As mentioned earlier, there are several amplifiers
to choose from and the specifications depend on the end
application. Figure 29 shows a typical multitone test.
Two other key considerations for the digital wideband receiver
are converter sample rate and IF frequency range. Since perfor-
mance of the AD6640 converter is largely independent of both
sample rate and analog input frequency (TPCs 4, 5, and 10), the
designer has greater flexibility in the selection of these parameters.
Also, since the AD6640 is a bipolar device, power dissipation is
not a function of sample rate. Thus there is no penalty paid in
power by operating at faster sample rates. All of this is good
because, by carefully selecting the input frequency range and
sample rate, some of the drive amplifier and ADC harmonics
can actually be placed out-of-band.
For example, if the system has second and third harmonics that
are unacceptably high, by carefully selecting the ENCODE rate
and signal bandwidth, these second and third harmonics can be
placed out-of-band. For the case of an ENCODE rate equal to
60 MSPS and a signal bandwidth of 7.5 MHz, placing the fun-
damental at 7.5 MHz places the second and third harmonics out
of band as shown in the Table II.
–100
–120
–20
–40
–60
–80
0
dc
PRESELECT
Figure 29. Multitone Performance
FILTER
ENCODE = 65MSPS
6.5
LNA
1900MHz
DRIVE
65MHz
SYNTHESIZER
REFERENCE
LO
FREQUENCY – MHz
13.0
M/N PLL
CLOCK
19.5
5MHz–15MHz
PASS BAND
REF
IN
Figure 28. Simplified Wideband PCS Receiver
26.0
+5V (A)
32.5
ENCODE
ENCODE
AIN
AIN
AD6640
D11
–19–
D0
+3.3V (D)
ENCODE Rate
Fundamental
Second Harmonic
Third Harmonic
Another option can be found through band-pass sampling. If the
analog input signal range is from dc to f
and filter combination must perform to the specification required.
However, if the signal is placed in the third Nyquist zone (f
3 f
performance required by the system specifications since all
harmonics would fall outside the pass-band filter. For example,
the pass-band filter would range from f
harmonic would span from 2 f
band filter’s range. The burden then has been passed off to the
filter design, provided that the ADC meets the basic specifications
at the frequency of interest. In many applications, this is a worth-
while trade-off since many complex filters can easily be realized
using SAW and LCR techniques at these relatively high IF fre-
quencies. Although harmonic performance of the drive amplifier
is relaxed by this technique, intermodulation performance cannot
be sacrificed since intermods must be assumed to fall in-band for
both amplifiers and converters.
Noise Floor and SNR
Oversampling is sampling at a rate that is greater than twice the
bandwidth of the signal desired. Oversampling does not have
anything to do with the actual frequency of the sampled signal;
it is the bandwidth of the signal that is key. Band-pass or IF
sampling refers to sampling a frequency that is higher than Nyquist
and often provides additional benefits such as down conversion
using the ADC and replacing a mixer with a track-and-hold. Over-
sampling leads to processing gains because the faster the signal is
digitized, the wider the distribution of noise. Since the integrated
noise must remain constant, the actual noise floor is lowered by
3 dB each time the sample rate is doubled. The effective noise
density for an ADC may be calculated by the equation
For a typical SNR of 68 dB and a sample rate of 65 MSPS, this
is equivalent to 25 nV/√Hz. This equation shows the relationship
between the SNR of the converter and the sample rate f
equation may be used for computational purposes to determine
overall receiver noise.
348
S
/2), the amplifier is no longer required to meet the harmonic
BUFFER
CMOS
12
V
(REF. FIG 27)
NOISE rms
AD6620
CLK
60 MSPS
7.5 MHz–15 MHz
15 MHz–30 MHz
22.5 MHz–30 MHz, 30 MHz–15 MHz
DATA
I & Q
Table II.
/ Hz =
S
ADSP-2181
to 3 f
S
S
10
, well outside the pass-
to 3 f
S
−SNR /20
/2, then the amplifier
4 FS
S
NETWORK
CONTROLLER
INTERFACE
/2. The second
AD6640
S
. This
S
to

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