AD9201 Analog Devices, AD9201 Datasheet
AD9201
Specifications of AD9201
Available stocks
Related parts for AD9201
AD9201 Summary of contents
Page 1
... The AD9201 is manufactured on an advanced low cost CMOS process, operates from a single supply from 2 5.5 V, and consumes 215 mW of power ( supply). The AD9201 input structure accepts either single-ended or differential signals, providing excellent dynamic performance up to and beyond its 10 MHz Nyquist input frequencies ...
Page 2
... AD9201–SPECIFICATIONS Parameter RESOLUTION CONVERSION RATE DC ACCURACY Differential Nonlinearity Integral Nonlinearity Differential Nonlinearity (SE) Integral Nonlinearity (SE) Zero-Scale Error, Offset Error Full-Scale Error, Gain Error Gain Match Offset Match ANALOG INPUT Input Voltage Range Input Capacitance Aperture Delay Aperture Uncertainty (Jitter) Aperture Delay Match Input Bandwidth (– ...
Page 3
... Max Units Condition 0 pF. Output Level to L 90% of Final Value Cycles ADC SAMPLE ADC SAMPLE # CHANNEL OUTPUT ENABLED SAMPLE #1 SAMPLE #2 Q CHANNEL Q CHANNEL OUTPUT OUTPUT SAMPLE #1 I CHANNEL OUTPUT AD9201 ...
Page 4
... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9201 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
Page 5
... SIGNAL-TO-NOISE AND DISTORTION (S/N+D, SINAD) RATIO S/N+D is the ratio of the rms value of the measured input signal to the rms sum of all other spectral components below the Nyquist frequency, including harmonics but excluding dc. The value for S/N+D is expressed in decibels. –5– AD9201 AVDD AVDD AVSS AVSS c. CLK AVDD ...
Page 6
... Characteristic Curves AD9201 (AVDD = +3 V, DVDD = + MHz (50% duty cycle input span from –0 +1 internal reference unless otherwise noted) 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 0 128 256 384 512 640 CODE OFFSET Figure 3. Typical INL (1 V Internal Reference ...
Page 7
... Figure 12. Grounded Input Histogram 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 –30 1.00E+06 1.00E+07 1.00E+08 INPUT FREQUENCY – Hz Figure 13. Full Power Bandwidth 60 –0.5dB 55 –6.0dB –20.0dB 35 1.00E+05 1.00E+07 1.00E+06 INPUT FREQUENCY – Hz AD9201 150400 N+1 1.00E+09 1.00E+08 ...
Page 8
... This produces a very high input impedance on the part, allowing effectively driven from high impedance sources. This means that the AD9201 could even be driven directly by a passive antialias filter. IINA IINB Figure 16. Equivalent Circuit for AD9201 Analog Inputs ...
Page 9
... VOLTAGE Figure 19. Example Configuration for Transformer Coupled Inputs Crosstalk: The internal layout of the AD9201, as well as its pinout, was configured to minimize the crosstalk between the two input signals. Users wishing to minimize high frequency crosstalk should take care to provide the best possible decoupling for input pins (see Figure 20) ...
Page 10
... AD9201 REFERENCE AND REFERENCE BUFFER The reference and buffer circuitry on the AD9201 is configured for maximum convenience and flexibility. An illustration of the equivalent reference circuit is show in Figure 26. The user can select from five different reference modes through appropriate pin-strapping (see Table I below). These pin strapping options cause the internal circuitry to reconfigure itself for the appropri- ate operating mode ...
Page 11
... IREFT/IREFB or QREFT/ QREFB. A connection to both sides is not required. DRIVING THE AD9201 Figure 27 illustrates the use of an AD8051 to drive the AD9201. Even though the AD8051 is specified with 3 V and 5 V power, the best results are obtained power. The ADC input span ...
Page 12
... Inspection of the curves will yield the following conclusions AD9201 running with AVDD = the easiest to drive. 2. Differential inputs are the most insensitive to common-mode voltage AD9201 powered by AVDD = 3 V and a single ended input, should have span with a common-mode voltage of 0.75 V. –10 –20 2V SPAN – ...
Page 13
... When the select pin is held HIGH, the “I” level will be presented to the output word (see Figure 1). The AD9201’s select and clock pins may be driven by a com- mon signal source. The data will change after the edges of the input pulse. The user must make sure the inter- face latches have sufficient hold time for the AD9201’ ...
Page 14
... Grounds should be connected near the ADC recommended that a printed circuit board (PCB least four layers, employing a ground plane and power planes, be used with the AD9201. The use of ground and power planes offers distinct advantages: 1. The minimization of the loop area encompassed by a signal and its return path ...
Page 15
... EVALUATION BOARD The AD9201 evaluation board is shipped “ready to run.” Power and signal generators should be connected as shown in Figure 35. Then the user can observe the performance of the Q channel. If the user wants to observe the I channel, then he should install a jumper at JP22 Pins 1 and 2. If the user wants to toggle between I and Q channels, then a CMOS level pulse train should be applied to the “ ...
Page 16
... AD9201 Figure 36. Evaluation Board Solder-Side Silkscreen (NOT TO SCALE) Figure 37. Evaluation Board Component-Side Layout R50 R51 C50 C14 C51 C14 C20 C17 C22 C23 C27 C24 C53 R52 R53 (NOT TO SCALE) –16– REV. D ...
Page 17
... TO SCALE) Figure 38. Evaluation Board Ground Plane Layout (NOT TO SCALE) REV. D Figure 39. Evaluation Board Solder-Side Layout –17– AD9201 ...
Page 18
... AD9201 I_IN AGND J1 AVDD TP3 AGND J4 Q_IN (NOT TO SCALE) Figure 40. Evaluation Board Component-Side Silkscreen (NOT TO SCALE) STROBE AGND AVDD CLOCK BJ1 C40 BJ2 J5 J6 C42 + R38 L2 C38 C41 JP22 R37 R13 V8 R11 JP15 JP21 R32 TP7 JP3 T1 JP13 4 TP2 C15 TP1 ...
Page 19
... REV. D Figure 42. Evaluation Board –19– AD9201 ...
Page 20
... AD9201 0.078 (1.98) 0.068 (1.73) 0.008 (0.203) 0.002 (0.050) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Lead Shrink Small Outline Package (SSOP) (RS-28) 0.407 (10.34) 0.397 (10.08 0.07 (1.79) PIN 1 0.066 (1.67) 8 0.0256 0.015 (0.38) 0 SEATING 0.009 (0.229) (0.65) 0.010 (0.25) PLANE BSC 0.005 (0.127) –20– 0.03 (0.762) 0.022 (0.558) REV. D ...