AD9281 Analog Devices, AD9281 Datasheet
AD9281
Specifications of AD9281
Available stocks
Related parts for AD9281
AD9281 Summary of contents
Page 1
... I and Q or diversity channel information. 2. Low Power Complete CMOS Dual ADC function consumes a low 225 single supply ( supply). The AD9281 operates on supply voltages from 2 5 On-Chip Voltage Reference The AD9281 includes an on-chip compensated bandgap voltage reference pin programmable for ...
Page 2
... AD9281–SPECIFICATIONS Parameter RESOLUTION CONVERSION RATE DC ACCURACY Differential Nonlinearity Integral Nonlinearity 1 Differential Nonlinearity (SE) 1 Integral Nonlinearity (SE) Zero-Scale Error, Offset Error Full-Scale Error, Gain Error Gain Match Offset Match ANALOG INPUT Input Voltage Range Input Capacitance Aperture Delay Aperture Uncertainty (Jitter) Aperture Delay Match Input Bandwidth (– ...
Page 3
... ADC SAMPLE ADC SAMPLE ADC SAMPLE # CHANNEL MD OUTPUT ENABLED SAMPLE #1-1 Q CHANNEL OUTPUT SAMPLE #1-2 Q CHANNEL OUTPUT SAMPLE #1-1 I CHANNEL OUTPUT Figure 1. ADC Timing –3– AD9281 Units Condition pF. Output Level to L 90% of Final Value ...
Page 4
... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9281 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
Page 5
... SIGNAL-TO-NOISE AND DISTORTION (S/N+D, SINAD) RATIO S/N+D is the ratio of the rms value of the measured input sig- nal to the rms sum of all other spectral components below the Nyquist frequency, including harmonics but excluding dc. The value for S/N+D is expressed in decibels. –5– AD9281 AVDD AVDD AVSS AVSS c. CLK AVDD AVSS g ...
Page 6
... AD9281 –Typical Characteristic Curves (AVDD = +3 V, DVDD = + MHz (50% duty cycle input span from –0 +1 internal reference unless otherwise noted – 112 128 144 160 176 192 208 224 240 CODE OFFSET Figure 3. Typical INL ...
Page 7
... Figure 14. SNR vs. Input Frequency (Single-Ended) –7– AD9281 10000000 12050 800 N–1 N N+1 CODE Figure 12. Grounded Input Histogram 1.00E+07 1.00E+08 INPUT FREQUENCY – Hz Figure 13. Full Power Bandwidth –0.5dB –6dB –20dB 1.00E+06 1.00E+07 INPUT FREQUENCY – ...
Page 8
... ADC input struc- tures. This produces a very high input impedance on the part, allowing effectively driven from high impedance sources. This means that the AD9281 could even be driven directly by a passive antialias filter. IINA IINB Figure 16 ...
Page 9
... Users with differential input signals will probably want to take advantage of the differential input structure of the AD9281. Performance is still very good for single-ended inputs. Convert- ing a single-ended input to a differential signal for application to the converter is probably only worth considering for very high frequency input signals ...
Page 10
... AD9281 REFERENCE AND REFERENCE BUFFER The reference and buffer circuitry on the AD9281 is configured for maximum convenience and flexibility. An illustration of the equivalent reference circuit is show in Figure 26. The user can select from five different reference modes through appropriate pin-strapping (see Table I below). These pin strapping options cause the internal circuitry to reconfigure itself for the appropri- ate operating mode ...
Page 11
... Inspection of the curves will yield the following conclusions AD9281 running with AVDD = the easiest to drive. 2. Differential inputs are the most insensitive to common-mode voltage AD9281 powered by AVDD = 3 V and a single ended input, should have span with a common-mode voltage of 0.75 V. –15 –25 – ...
Page 12
... reduction in output delays can be achieved by limiting the logic load per output line. THREE-STATE OUTPUTS The digital outputs of the AD9281 can be placed in a high impedance state by setting the CHIP SELECT pin to HIGH. This feature is provided to facilitate in-circuit testing or evaluation. SELECT When the select pin is held LOW, the output word will present the “ ...
Page 13
... Grounds should be connected near the ADC recommended that a printed circuit board (PCB least four layers, employing a ground plane and power planes, be used with the AD9281. The use of ground and power planes offers distinct advantages: 1. The minimization of the loop area encompassed by a signal and its return path ...
Page 14
... AD9281 REVISION HISTORY 1/11—Rev Rev. F Updated Format .................................................................. Universal Changes to Pin Configuration Diagram ........................................ 4 Changes to Pin Function Descriptions Table ................................ 4 Removed Evaluation Boards; Renumbered Sequentially ............................................................................ Changes to Ordering Guide ........................................................... 15 8/99—Rev Rev. E Rev Page ...
Page 15
... SEATING 0.22 PLANE 0.65 BSC COMPLIANT TO JEDEC STANDARDS MO-150-AH Figure 33. 28-Lead Shrink Small Outline Package [SSOP] (RS-28) Dimensions shown in millimeters Package Description 28-Lead SSOP 28-Lead SSOP 28-Lead SSOP 28-Lead SSOP D00583-0-1/11(F) Rev Page 0.25 0.09 8° 0.95 4° 0.75 0° 0.55 Package Option RS-28 RS-28 RS-28 RS-28 AD9281 ...