AD7813 Analog Devices, AD7813 Datasheet

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AD7813

Manufacturer Part Number
AD7813
Description
+2.7 V to +5.5 V, 400 kSPS 8-/10-Bit Sampling ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7813

Resolution (bits)
10bit
# Chan
1
Sample Rate
400kSPS
Interface
Byte
Analog Input Type
SE-Uni
Ain Range
Uni (Vref)
Adc Architecture
SAR
Pkg Type
DIP,SOIC,SOP

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a
GENERAL DESCRIPTION
The AD7813 is a high-speed, microprocessor-compatible,
8-/10-bit analog-to-digital converter with a maximum through-
put of 400 kSPS. The converter operates off a single 2.7 V to
5.5 V supply and contains a 2.3 µs successive approximation
A/D converter, track/hold circuitry, on-chip clock oscillator and
8-bit wide parallel interface. The parallel interface is designed to
allow easy interfacing to microprocessors and DSPs. The 10-bit
conversion result is read by carrying out two 8-bit read opera-
tions. The first read operation accesses the 8 MSBs of the ADC
conversion result and the second read accesses the 2 LSBs.
Using only address decoding logic the AD7813 is easily mapped
into the microprocessor address space.
When used in its power-down mode, the AD7813 automatically
powers down at the end of a conversion and powers up at the
start of a new conversion. This feature significantly reduces the
power consumption of the part at lower throughput rates. The
AD7813 can also operate in a high speed mode where the part is
not powered down between conversions. In this mode of opera-
tion the part is capable of providing 400 kSPS throughput.
The part is available in a small, 16-lead, 0.3" wide, plastic dual-
in-line package (DIP), in a 16-lead, 0.15" wide, narrow body
small outline IC (SOIC) and in a 16-lead thin shrink small
outline package (TSSOP).
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
8-/10-Bit ADC with 2.3 s Conversion Time
On-Chip Track and Hold
Operating Supply Range: 2.7 V to 5.5 V
Specifications at 2.7 V – 3.6 V and 5 V
8-Bit Parallel Interface
Power Performance
Analog Input Range: 0 V to V
Reference Input Range: 1.2 V to V
8-Bit + 2-Bit Read
Normal Operation
Automatic Power-Down
10.5 mW, V
34.6 W @ 1 kSPS, V
DD
= 3 V
DD
= 3 V
REF
DD
10%
PRODUCT HIGHLIGHTS
1. Low Power, Single Supply Operation
2. Automatic Power-Down
3. Parallel Interface
4. Dynamic Specifications for DSP Users
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
The AD7813 operates from a single 2.7 V to 5.5 V supply
and typically consumes only 10.5 mW of power. The power
dissipation can be significantly reduced at lower through-
put rates by using the automatic power-down mode.
The automatic power-down mode, whereby the AD7813
goes into power-down mode at the end of a conversion and
powers up before the next conversion, means the AD7813
is ideal for battery powered applications; e.g., 34.6 µW
@ 1 kSPS. (See Power vs. Throughput Rate section.)
An easy to use 8-bit-wide parallel interface allows interfacing
to most popular microprocessors and DSPs with minimal
external circuitry.
In addition to the traditional ADC specifications, the AD7813
is specified for ac parameters, including signal-to-noise ratio
and distortion.
V
IN
AD7813
V
T/H
FUNCTIONAL BLOCK DIAGRAM
DD
2.7 V to 5.5 V, 400 kSPS
8-/10-Bit Sampling ADC
AGND
World Wide Web Site: http://www.analog.com
REDISTRIBUTION
CHARGE
COMP
V
DAC
REF
CLOCK
OSC
BUSY CS RD
© Analog Devices, Inc., 2000
CONTROL
LOGIC
DRIVERS
THREE-
AD7813
STATE
CONVST
DB7
DB0

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AD7813 Summary of contents

Page 1

... This feature significantly reduces the power consumption of the part at lower throughput rates. The AD7813 can also operate in a high speed mode where the part is not powered down between conversions. In this mode of opera- tion the part is capable of providing 400 kSPS throughput. ...

Page 2

... AD7813–SPECIFICATIONS Parameter DYNAMIC PERFORMANCE 1 Signal to (Noise + Distortion) Ratio 1 Total Harmonic Distortion (THD) 1 Peak Harmonic or Spurious Noise 2 Intermodulation Distortion 2nd Order Terms 3rd Order Terms DC ACCURACY Resolution Minimum Resolution for Which No Missing Codes Are Guaranteed 1 Relative Accuracy 1 Differential Nonlinearity (DNL) 1 Gain Error ...

Page 3

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7813 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 4

... CONVST 4 CONVST signal. A high-to-low transition on this line initiates the conversion process if the internal CONVST signal is low. Depending on the signal on this pin at the end of a conversion, the AD7813 automatically powers down. CS Chip Select. This is a logic input used in conjunction with RD to enable outputs. ...

Page 5

... N-bit converter with a sine wave input is given by: Signal to (Noise + Distortion) = (6.02N + 1.76) dB Thus for an 10-bit converter, this is 62 dB. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the rms sum of harmonics to the fundamental. For the AD7813 it is defined as ...

Page 6

... DAC Analog Input Figure 5 shows an equivalent circuit of the analog input struc- CONTROL ture of the AD7813. The two diodes, D1 and D2, provide ESD LOGIC protection for the analog inputs. Care must be taken to ensure that the analog input signal never exceeds the supply rails by CLOCK more than 200 mV ...

Page 7

... The power dissipation during normal operation is 10.5 mW 1.5 µs and the conversion time is 2.3 µs, the AD7813 can then be said to dissipate 10.5 mW for 3.8 µs (worst-case) during each conversion cycle. If the throughput rate is 10 kSPS, the cycle time is 100 µ ...

Page 8

... AD7813 is powered down. The AD7813 is powered up again on the rising edge of the CONVST signal. The gated CONVST pulse will now remain high long enough for the AD7813 to fully power up, which takes about 1.5 µs. This is ensured by the internal CONVST signal, which will remain high for 1.5 µs. ...

Page 9

... ADC conversion result again. The parallel interface of the AD7813 is reset when BUSY goes logic high. This feature allows the AD7813 to be used as an 8-bit converter if the user only wishes to access the 8 MSBs of the conversion. Care must be taken to ensure that a read operation does not occur while BUSY is high ...

Page 10

... Port 2. Port 2 latches remain stable when the AD7813 is addressed, as they do not have to be turned around (set to 1) for data input as is the case for Port 0. 8051* AD0– ...

Page 11

... Thin Shrink Small Outline Package (RU-16) 0.201 (5.10) 0.193 (4.90 PIN 1 0.006 (0.15) 0.0433 0.002 (0.05) (1.10) MAX 8° 0.0118 (0.30) 0.0256 0° SEATING 0.0079 (0.20) (0.65) 0.0075 (0.19) PLANE BSC 0.0035 (0.090) –11– AD7813 0.325 (8.25) 0.195 (4.95) 0.300 (7.62) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 0.0196 (0.50) x 45° 0.0099 (0.25) 0.0500 (1.27) 0.0160 (0.41) 0.028 (0.70) 0.020 (0.50) ...

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