AD5542A Analog Devices, AD5542A Datasheet
AD5542A
Specifications of AD5542A
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AD5542A Summary of contents
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... Kelvin sense connections for the reference and analog ground pins to reduce layout sensitivity. The AD5512A/AD5542A are available in a 16-lead LFCSP with the AD5542A also available in a 10-lead LFCSP and a 16-lead TSSOP. The AD5512A/AD5542A use a versatile 3-wire interface that is compatible with 50 MHz SPI, QSPI™, MICROWIRE™, and DSP interface standards ...
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... Power-On Reset .......................................................................... 17 Power Supply and Reference Bypassing .................................. 17 Applications Information .............................................................. 18 Microprocessor Interfacing ....................................................... 18 AD5512A/AD5542A to ADSP-BF531 Interface .................... 18 AD5512A/AD5542A to SPORT Interface .............................. 18 AD5512A/AD5542A to 68HC11/68L11 Interface .................... 18 AD5512A/AD5542A to ADSP-2101 Interface ....................... 18 AD5512A/AD5542A to MICROWIRE Interface .................. 18 Layout Guidelines....................................................................... 19 Galvanically Isolated Interface ................................................. 19 Decoding Multiple DACs .......................................................... 19 Outline Dimensions ....................................................................... 20 Ordering Guide .......................................................................... 21 Rev Page ...
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... V Unipolar operation V Bipolar operation kΩ Tolerance typically 20% LSB ΔV ± 10% DD nV/√Hz DAC code = 0x840 (AD5512A) or 0x8400 (AD5542A), frequency = 1 kHz, unipolar mode μV p-p 0 Hz, unipolar mode V kΩ Unipolar operation kΩ Bipolar operation pF Code 0x0000 pF Code 0x3FFF μA ...
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... A LSB ppm/°C V Unipolar operation V Bipolar operation kΩ Tolerance typically 20% LSB ΔV ± 10% DD nV/√Hz DAC code = 0x840 (AD5512A) or 0x8400 (AD5542A), frequency = 1 kHz, unipolar mode μV p-p 0 kΩ Unipolar operation kΩ Bipolar operation pF Code 0x0000 pF Code 0xFFFF μ ...
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... All 0s loaded, V 0.2 nV-sec Digitally generated sine wave at 1 kHz 74 dB DAC code = 0x3FFF (AD5512A) or 0xFFFF (AD5542A), frequency 10 kHz, = 2.5 V ± p-p V REF Rev Page AD5512A/AD5542A −40°C < T < +125°C, unless otherwise noted p-p at 100 kHz ...
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... DB15 DIN 2 DB11 LDAC CLR NOTES 1. FOR AD5542A = DB15. 2. FOR AD5512A = DB11 10 AGND = DGND = 0 V, unless otherwise noted. LOGIC INL LOGIC 3 4 Limit 2.7 V ≤ V ≤ 5.5 V Unit LOGIC 50 MHz max 20 ns min 10 ns min ...
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... DD Digital Input Voltage to DGND V to AGND OUT AGNDF, AGNDS to DGND Input Current to Any Pin Except Supplies Operating Temperature Range AD5512A Industrial (A Version) AD5542A Industrial (A, B Versions) Storage Temperature Range Maximum Junction Temperature (T max) J Package Power Dissipation Thermal Impedance, θ JA TSSOP (RU-16) LFCSP (CP-16-22) ...
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... AD5512A/AD5542A PIN CONFIGURATION AND FUNCTION DESCRIPTIONS V 1 OUT AGNDF 2 TOP VIEW AGNDS 3 4 REFS CONNECT (Not to Scale) Figure 4. AD5512A/AD5542A 16-Lead LFCSP Pin Configuration Table 7. AD5512A/AD5542A Pin Function Descriptions Pin No. 16-Lead 10-Lead LFCSP LFCSP Mnemonic OUT 2 AGNDF 3 AGNDS 4 REFS 5 REFF ...
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... Analog Supply Voltage ± 10 OUT LOGIC AGNDF 3 14 INV AD5542A TOP VIEW AGNDS 4 DGND 13 (Not to Scale) REFS 12 LDAC 5 REFF 6 CLR DIN CS 8 SCLK CONNECT Figure 6. AD5542A 16-Lead TSSOP Pin Configuration Rev Page AD5512A/AD5542A ...
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... CODE Figure 10. AD5542A Differential Nonlinearity vs. Code 2.5V REF 0 –60 –40 – 100 TEMPERATURE (° 25°C A DNL 0 INL REFERENCE VOLTAGE (V) Figure 12. AD5542A Linearity Error vs. Reference Voltage 120 140 5 6 ...
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... A A 0.10 0.05 0 –0.05 –0.10 –0.15 85 Figure 16. AD5512A/AD5542A Zero-Code Error vs. Temperature 2 25°C A 1.5 1.0 0 Figure 17. AD5512A/AD5542A Supply Current vs. Reference Voltage or 200 150 100 10,000 Figure 18. AD5512A/AD5542A Reference Current vs. Code Rev Page AD5512A/AD5542A = 5V = 2.5V – TEMPERATURE (°C) REFERENCE VOLTAGE ...
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... Figure 22. AD5512A/AD5542A Small Signal Settling Time 5 +125°C +25°C –55° 100 110 I SUPPLY (µA) DD Figure 23. AD5512A/AD5542A Analog Supply Current Histogram RAILS (µA) LOGIC Figure 24. AD5512A/AD5542A Digital Supply Current Histogram V ...
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... 2.5V REF T = 25°C A DATA = 0x0000 5 0 – FREQUENCY (Hz) Figure 25. AD5512A/AD5542A 0 Output Noise 2.5V REF T = 25° 600 700 800 900 1000 1100 FREQUENCY (Hz) Figure 26. AD5512A/AD5542A Noise Spectral Density vs. Frequency,1 kHz ...
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... AD5512A/AD5542A TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy or INL is a measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. A typical INL vs. code plot is shown in Figure 7. Differential Nonlinearity (DNL) DNL is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of ± ...
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... The LSB size is V /65,536. REF SERIAL INTERFACE The AD5512A/AD5542A are controlled by a versatile wire serial interface that operates at clock rates MHz and is compatible with SPI, QSPI, MICROWIRE, and DSP interface standards. The timing diagram is shown in Figure 3. Input data is framed by the chip select input After a high- ...
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... INV this bipolar output swing, typically shows the transfer function for this output operating mode. Also provided on the AD5542A are a set of Kelvin connections to the analog ground inputs. The example includes the INTERFACE 2.5 V reference and the reference buffer. Table 10. AD5542A Bipolar Code Table ...
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... The selected op amp must have a very low-offset voltage (the DAC LSB is 38 μV for the AD5542A with a 2.5 V reference) to eliminate the need for output offset trims. Input bias current should also be very low because the bias current, multiplied by the DAC output impedance (approximately 6 kΩ ...
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... MICROWIRE-compatible device. Serial data is shifted out on the falling edge of the serial clock and into the AD5512A/ AD5542A on the rising edge of the serial clock. No glue logic is required because the DAC clocks data into the input shift register on the rising edge. ...
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... Design the printed circuit board (PCB) on which the AD5512A/AD5542A is mounted so that the analog and digital sections are separated and confined to certain areas of the board. If the AD5512A/AD5542A are in a system where multiple devices require an analog ground-to- digital ground connection, make the connection at one point only ...
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... AD5512A/AD5542A OUTLINE DIMENSIONS PIN 1 INDICATOR 0.80 0.75 0.70 SEATING PLANE 0.15 0.05 3.10 0.30 3.00 SQ 0.23 2.90 0.18 13 0.50 12 BSC EXPOSED 9 8 0.50 TOP VIEW BOTTOM VIEW 0.40 0.30 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. Figure 40. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ × Body, Very Very Thin Quad (CP-16-22) Dimensions shown in millimeters 5 ...
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... LSB ±1 LSB AD5542AARUZ ±2 LSB ±1 LSB AD5542AARUZ-REEL7 ±2 LSB ±1 LSB AD5542ABCPZ-REEL7 ±1 LSB ±1 LSB AD5542AACPZ-REEL7 ±2 LSB ±1 LSB AD5442ABCPZ-1-RL7 ±1 LSB ±1 LSB AD5542ABCPZ-500RL7 ±1 LSB ±1 LSB EVAL-AD5542ASDZ RoHS Compliant Part. 2.48 2.38 3.10 2.23 3.00 SQ 2.90 6 0.50 0.40 0.30 5 ...
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... AD5512A/AD5542A NOTES Rev Page ...
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... NOTES Rev Page AD5512A/AD5542A ...
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... AD5512A/AD5542A NOTES ©2010-2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09199-0-5/11(A) Rev Page ...