ADAU1701JSTZ Analog Devices Inc, ADAU1701JSTZ Datasheet

IC AUDIO PROC 2ADC/4DAC 48-LQFP

ADAU1701JSTZ

Manufacturer Part Number
ADAU1701JSTZ
Description
IC AUDIO PROC 2ADC/4DAC 48-LQFP
Manufacturer
Analog Devices Inc
Series
SigmaDSP®r
Type
Audio Processorr
Datasheets

Specifications of ADAU1701JSTZ

Design Resources
Analog Audio Input, Class-D Output with ADAU1701, SSM2306, and ADP3336 (CN0162)
Applications
Automotive, Monitors, MP3
Mounting Type
Surface Mount
Package / Case
48-LQFP
Audio Control Type
Digital
Control Interface
I2C, Serial
Supply Voltage Range
1.8V, 3.3V
Operating Temperature Range
0°C To +70°C
Audio Ic Case Style
LQFP
No. Of Pins
48
Svhc
No SVHC
Control / Process Application
MP3 Player Speaker Docks, Automotive Head Units, Studio Monitors
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADAU1701MINIZ - BOARD EVAL SIGMADSP AUD ADAU1701EVAL-ADAU1701EBZ - BOARD EVAL FOR ADAU1701
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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FEATURES
28-/56-bit, 50 MIPS digital audio processor
2 ADCs: SNR of 100 dB, THD + N of −83 dB
4 DACs: SNR of 104 dB, THD + N of −90 dB
Complete standalone operation
Self-boot from serial EEPROM
Auxiliary ADC with 4-input mux for analog control
GPIOs for digital controls and outputs
Fully programmable with SigmaStudio graphical tool
28-bit × 28-bit multiplier with 56-bit accumulator for full
Clock oscillator for generating a master clock from crystal
PLL for generating master clock from 64 × f
Flexible serial data input/output ports with I
Sampling rates of up to 192 kHz are supported
On-chip voltage regulator for compatibility with 3.3 V systems
48-lead, plastic LQFP
APPLICATIONS
Multimedia speaker systems
MP3 player speaker docks
Automotive head units
Minicomponent stereos
Digital televisions
Studio monitors
Speaker crossovers
Musical instrument effects processors
In-seat sound systems (aircraft/motor coaches)
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
double-precision processing
384 × f
left-justified, right-justified, and TDM modes
S
, or 512 × f
S
clocks
S
, 256 × f
2
S-compatible,
S
,
SigmaDSP 28-/56-Bit Audio Processor
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
GENERAL DESCRIPTION
The ADAU1701 is a complete single-chip audio system with a
28-/56-bit audio DSP, ADCs, DACs, and microcontroller-like
control interfaces. Signal processing includes equalization, cross-
over, bass enhancement, multiband dynamics processing, delay
compensation, speaker compensation, and stereo image widening.
This processing can be used to compensate for real-world
limitations of speakers, amplifiers, and listening environments,
providing dramatic improvements in perceived audio quality.
Its signal processing is comparable to that found in high end
studio equipment. Most processing is done in full 56-bit, double
precision mode, resulting in very good low level signal perfor-
mance. The ADAU1701 is a fully programmable DSP. The easy to
use SigmaStudio™ software allows the user to graphically configure
a custom signal processing flow using blocks such as biquad filters,
dynamics processors, level controls, and GPIO interface controls.
ADAU1701 programs can be loaded on power-up either from a
serial EEPROM through its own self-boot mechanism or from
an external microcontroller. On power-down, the current state
of the parameters can be written back to the EEPROM from the
ADAU1701 to be recalled the next time the program is run.
Two Σ-Δ ADCs and four Σ-Δ DACs provide a 98.5 dB analog
input to analog output dynamic. Each ADC has a THD + N of
−83 dB, and each DAC has a THD + N of −90 dB. Digital input
and output ports allow a glueless connection to additional
ADCs and DACs. The ADAU1701 communicates through an
I
with Two ADCs and Four DACs
2
C® bus or a 4-wire SPI port.
©2007–2011 Analog Devices, Inc. All rights reserved.
ADAU1701
www.analog.com

Related parts for ADAU1701JSTZ

ADAU1701JSTZ Summary of contents

Page 1

FEATURES 28-/56-bit, 50 MIPS digital audio processor 2 ADCs: SNR of 100 dB, THD + N of − DACs: SNR of 104 dB, THD + N of −90 dB Complete standalone operation Self-boot from serial EEPROM Auxiliary ADC ...

Page 2

ADAU1701 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 3 Functional Block Diagram .............................................................. 4 Specifications..................................................................................... 5 Analog Performance .................................................................... 5 Digital Input/Output.................................................................... 7 Power.............................................................................................. 7 Temperature Range ...................................................................... 7 PLL and Oscillator........................................................................ ...

Page 3

REVISION HISTORY 2/11—Rev Rev. A Moved Figure 1 ..................................................................................4 Changes to Specifications Section...................................................5 Changes to Table 8, Test Conditions/Comments Column ..........8 Reordered Figures in Digital Timing Diagrams Section .............9 Changes to Figure 2...........................................................................9 Changes to Figure 5 and ...

Page 4

ADAU1701 FUNCTIONAL BLOCK DIAGRAM 2-CHANNEL ANALOG INPUT FILTA/ ADC_RES 2 SELECT RESET SELFBOOT DIGITAL DIGITAL ANALOG ANALOG PLL PLL LOOP VDD GROUND VDD GROUND MODE 3. 1.8V ADAU1701 PLL REGULATOR STEREO ADC 28-/56-BIT, 50MIPS AUDIO ...

Page 5

SPECIFICATIONS AVDD = 3.3 V, DVDD = 1.8 V, PVDD = 3.3 V, IOVDD = 3.3 V, master clock input = 12.288 MHz, unless otherwise noted. ANALOG PERFORMANCE Specifications are guaranteed at 25°C (ambient). Table 1. Parameter ADC INPUTS Number ...

Page 6

ADAU1701 Specifications are guaranteed at 130°C (ambient). Table 2. Parameter ADC INPUTS Number of Channels Resolution Full-Scale Input Signal-to-Noise Ratio A-Weighted Dynamic Range A-Weighted Total Harmonic Distortion + Noise Interchannel Gain Mismatch Crosstalk DC Bias Gain Error DAC OUTPUTS Number ...

Page 7

DIGITAL INPUT/OUTPUT Table 3. Parameter Input Voltage, High Input Voltage, Low Input Leakage, High Input Leakage, Low Bidirectional Pin Pull-Up Current, Low MCLKI Input Leakage, High MCLKI Input Leakage, Low High Level Output Voltage Low Level Output Voltage Input Capacitance ...

Page 8

ADAU1701 REGULATOR 1 Table 7. Regulator Parameter DVDD Voltage 1 Regulator specifications are calculated using a Zetex Semiconductors FZT953 transistor in the circuit. DIGITAL TIMING SPECIFICATIONS 1 Table 8. Digital Timing Parameter t MIN MASTER CLOCK ...

Page 9

Parameter t MIN MULTIPURPOSE PINS AND RESET t GRT t GFT t GIL t 20 RLPW 1 All timing specifications are given for the default (I Digital Timing Diagrams t BIH INPUT_BCLK t BIL t LIS INPUT_LRCLK t SIS SDATA_INx ...

Page 10

ADAU1701 SDA SCL OUTPUT_BCLK t LOS OUTPUT_LRCLK t SODS t SODM SDATA_OUTx LEFT-JUSTIFIED MSB MODE SDATA_OUTx MODE SDATA_OUTx RIGHT-JUSTIFIED MODE 8-BIT CLOCKS (24-BIT DATA) 12-BIT CLOCKS (20-BIT DATA) 14-BIT CLOCKS (18-BIT DATA) 16-BIT CLOCKS (16-BIT DATA) t ...

Page 11

ABSOLUTE MAXIMUM RATINGS Table 9. Parameter Rating DVDD to GND 2.2 V AVDD to GND 4.0 V IOVDD to GND 4.0 V Digital Inputs DGND − 0.3 V, IOVDD + 0.3 ...

Page 12

ADAU1701 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 11. Pin Function Descriptions 1 Pin No. Mnemonic Type 1, 37, 42 AGND PWR 2 ADC0 A_IN 3 ADC_RES A_IN 4 ADC1 A_IN 5 RESET D_IN 6 SELFBOOT D_IN 7 ADDR0 D_IN 8 ...

Page 13

Pin No. Mnemonic Type 14 MP7 D_IO 15 MP6 D_IO 16 MP10 D_IO 17 VDRIVE A_OUT 18 IOVDD PWR 19 MP11 D_IO 20 ADDR1/CDATA/WB D_IN 21 CLATCH/WP D_IO 22 SDA/COUT D_IO 23 SCL/CCLK D_IO 26 MP9 D_IO/A_IO 27 MP8 ...

Page 14

ADAU1701 1 Pin No. Mnemonic Type 33 PGND PWR 34 PVDD PWR 35 PLL_LF A_OUT 36, 48 AVDD PWR 38, 39 PLL_MODE0, D_IN PLL_MODE1 40 CM A_OUT 41 FILTD A_OUT VOUT3 A_OUT 44 VOUT2 A_OUT 45 VOUT1 ...

Page 15

TYPICAL PERFORMANCE CHARACTERISTICS 0.20 0.15 0.10 0.05 0 –0.05 –0.10 –0.15 –0. FREQUENCY (kHz) Figure 8. ADC Pass-Band Filter Response 10 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 0 ...

Page 16

ADAU1701 SYSTEM BLOCK DIAGRAM 18kΩ AUDIO ADC INPUT SIGNALS 18kΩ 18kΩ + 10µF MULTIPURPOSE PIN INTERFACES ADCs DACs 3.3V 475Ω 3.3nF 56nF PLL SETTINGS 3MHz TO 25MHz 22pF 100Ω 22pF 3.3V 100nF 100nF 100nF 100nF 10µF 10µ IOVDD ...

Page 17

THEORY OF OPERATION The core of the ADAU1701 is a 28-bit DSP (56-bit with double- precision processing) optimized for audio processing. The program and parameter RAMs can be loaded with a custom audio processing signal flow built by using SigmaStudio ...

Page 18

ADAU1701 INITIALIZATION This section details the procedure for properly setting up the ADAU1701. The following five-step sequence provides an overview of how to initialize the IC: 1. Apply power to ADAU1701. 2. Wait for PLL to lock. 3. Load SigmaDSP ...

Page 19

The ADC power-down mode powers down both ADCs, and each DAC can be powered down individually. The current savings is about 15 mA when the ADCs are powered down and about 4 mA for each DAC that ...

Page 20

ADAU1701 VOLTAGE REGULATOR The digital voltage of the ADAU1701 must be set to 1.8 V. The chip includes an on-board voltage regulator that allows the device to be used in systems without an available 1.8 V supply but with an ...

Page 21

AUDIO ADCs The ADAU1701 has two Σ-Δ ADCs. The signal-to-noise ratio (SNR) of the ADCs is 100 dB, and the THD + N is −83 dB. The stereo audio ADCs are current input; therefore, a voltage- to-current resistor is required ...

Page 22

ADAU1701 AUDIO DACs The ADAU1701 includes four Σ-Δ DACs. The SNR of the DAC is 104 dB, and the THD + N is −90 dB. A full-scale output on the DACs is 0.9 V rms (2.5 V p-p). The DACs ...

Page 23

CONTROL PORTS The ADAU1701 can operate in one of three control modes: • control • SPI control • Self-boot (no external controller) The ADAU1701 has both a 4-wire SPI control port and a 2-wire ...

Page 24

ADAU1701 PORT The ADAU1701 supports a 2-wire serial (I microprocessor bus driving multiple peripherals. Two pins, serial data (SDA) and serial clock (SCL), carry information between the ADAU1701 and the system mode, ...

Page 25

SCL SDA START BY MASTER FRAME 1 CHIP ADDRESS BYTE SCL (CONTINUED) SDA (CONTINUED) FRAME 3 SUBADDRESS BYTE 2 SCL SDA START BY MASTER FRAME 1 CHIP ADDRESS BYTE SCL (CONTINUED) ...

Page 26

ADAU1701 Read and Write Operations Figure 22 shows the timing of a single-word write operation. Every ninth clock, the ADAU1701 issues an acknowledge by pulling SDA low. Figure 23 shows the timing of a burst mode write ...

Page 27

SPI PORT 2 By default, the ADAU1701 mode, but it can be put into SPI control mode by pulling CLATCH/WP low three times. The SPI port uses a 4-wire interface, consisting of CLATCH, CCLK, CDATA, and ...

Page 28

ADAU1701 SELF-BOOT On power-up, the ADAU1701 can load a program and a set of parameters that have been saved in an external EEPROM. Combined with the auxiliary ADC and the multipurpose pins, this eliminates the need for a microcontroller in ...

Page 29

The writeback function writes data from the ADAU1701 interface registers to the second page of the self-boot EEPROM, Address 32 to Address 63. Starting at EEPROM Address 26 (so that the interface register data begins at Address 32), the EEPROM ...

Page 30

ADAU1701 SIGNAL PROCESSING The ADAU1701 is designed to provide all audio signal processing functions commonly used in stereo or multichannel playback systems. The signal processing flow is designed using the SigmaStudio software, which allows graphical entry and real- time control ...

Page 31

RAMS AND REGISTERS Table 21. RAM Map and Read/Write Modes Memory Size Parameter RAM 1024 × 32 Program RAM 1024 × Internal registers should be cleared first to avoid clicks/pops. ADDRESS MAPS Table 21 shows the RAM map ...

Page 32

ADAU1701 Table 22. Parameter RAM Read/Write Format (Single Address) Byte 0 Byte 1 chip_adr[6:0], W/R 000000, param_adr[9:8] Table 23. Parameter RAM Block Read/Write Format (Burst Mode) Byte 0 Byte 1 chip_adr[6:0], W/R 000000, param_adr[9:8] Table 24. Program RAM Read/Write Format ...

Page 33

CONTROL REGISTER MAP 1 Table 32. Register Map MSB Register No. Address of D31 D30 D29 D28 D27 D26 D25 D24 Hex Dec Bytes Name D15 D14 D13 D12 D11 D10 D9 0x0800 2048 4 Interface 0[31:16] 0 Interface 0[15:0] ...

Page 34

ADAU1701 MSB Register No. Address of D31 D30 D29 D28 D27 D26 D25 D24 Hex Dec Bytes Name D15 D14 D13 D12 D11 D10 D9 0x0820 2080 3 MP Pin Config. 0[23:16] MP Pin Config. 0[15:0] MP33 MP32 MP31 MP30 ...

Page 35

CONTROL REGISTER DETAILS 2048 TO 2055 (0x0800 TO 0x0807)—INTERFACE REGISTERS The interface registers are used in self-boot mode to save parameters that need to be written to the external EEPROM. The ADAU1701 then recalls these parameters from the EEPROM after ...

Page 36

ADAU1701 2056 (0x0808)—GPIO PIN SETTING REGISTER This register allows the user to set the GPIO pins through the control port. High or low settings can be directly written to or Table 35. GPIO Pin Setting Register Bit Map D15 D14 ...

Page 37

TO 2060 (0x0809 TO 0x080C)—AUXILIARY ADC DATA REGISTERS These registers hold the data generated by the 4-channel auxiliary ADC. The ADCs have eight bits of precision and can be extended to 12 bits if filtering is selected via Bits ...

Page 38

ADAU1701 2064 TO 2068 (0x0810 TO 0x0814)—SAFELOAD DATA REGISTERS Many applications require real-time microcontroller control of signal processing parameters, such as filter coefficients, mixer gains, multichannel virtualizing parameters, or dynamics processing curves. When controlling a biquad filter, for example, all ...

Page 39

TO 2075 (0x081A TO 0x081B)—DATA CAPTURE REGISTERS The ADAU1701 data capture feature allows the data at any node in the signal processing flow to be sent to one of two readable registers. This feature is useful for monitoring and ...

Page 40

ADAU1701 2076 (0x081C)—DSP CORE CONTROL REGISTER Table 46. DSP Core Control Register Bit Map D15 D14 D13 D12 D11 RSVD RSVD GD1 GD0 RSVD Table 47. DSP Core Control Register Bit Name Description GD[1:0] GPIO Debounce Control. Sets debounce time ...

Page 41

OUTPUT CONTROL REGISTER Table 48. Serial Output Control Register Bit Map D15 D14 D13 D12 D11 D10 0 0 OLRP OBP M/S OBF1 Table 49. Bit Name Description OLRP OUTPUT_LRCLK Polarity. When this bit is set to 0, ...

Page 42

ADAU1701 2079 (0x081F)—SERIAL INPUT CONTROL REGISTER Table 50. Serial Input Control Register Bit Map Table 51. Bit Name Description ILP INPUT_LRCLK Polarity. When this bit is set to 0, the left-channel data on the ...

Page 43

TO 2081 (0x0820 TO 0x0821)— MULTIPURPOSE PIN CONFIGURATION REGISTERS Each multipurpose pin can be set to different functions from these registers (2080 to 2081). The two 3-byte registers are broken up into 12 4-bit (nibble) sections that each control ...

Page 44

ADAU1701 2082 (0x0822)—AUXILIARY ADC AND POWER CONTROL Table 55. Auxiliary ADC and Power Control Bit Map D15 D14 D13 D12 D11 RSVD RSVD RSVD RSVD RSVD Table 56. Bit Name Description FIL[1:0] Auxiliary ADC filtering FIL[1: ...

Page 45

SETUP To properly initialize the DACs, Bits DS[1:0] in this register should be set to 01. Table 61. DAC Setup Bit Map D15 D14 D13 D12 D11 RSVD RSVD RSVD RSVD RSVD Table 62. Bit Name Description DS[1:0] ...

Page 46

ADAU1701 MULTIPURPOSE PINS The ADAU1701 has 12 multipurpose (MP) pins that can be individually programmed to be used as serial data inputs, serial data outputs, digital control inputs/outputs to and from the SigmaDSP core, or inputs to the 4-channel auxiliary ...

Page 47

The serial data clocks need to be synchronous with the ADAU1701 master clock input. The input control register allows control of clock polarity and data input modes. The valid data formats are I right-justified (24-/20-/18-/16-bit), and 8-channel TDM. In all ...

Page 48

ADAU1701 LEFT CHANNEL LRCLK BCLK SDATA MSB LRCLK LEFT CHANNEL BCLK MSB SDATA LEFT CHANNEL LRCLK BCLK SDATA MSB LRCLK BCLK DATA LRCLK BCLK MSB TDM SDATA CH 0 SLOT 0 SLOT 1 32 BCLKs LSB 1 Figure ...

Page 49

LAYOUT RECOMMENDATIONS PARTS PLACEMENT The ADC input voltage-to-current resistors and the ADC current set resistor should be placed as close as possible to the 2, 3, and 4 input pins. All 100 nF bypass capacitors, which are recommended for every ...

Page 50

ADAU1701 TYPICAL APPLICATION SCHEMATICS SELF-BOOT MODE U1 ADAU1701 Figure 37. Self-Boot Mode Schematic Rev Page ...

Page 51

I C CONTROL U1 ADAU1701 2 Figure 38 Control Schematic Rev Page ADAU1701 ...

Page 52

ADAU1701 SPI CONTROL U1 ADAU1701 Figure 39. SPI Control Schematic Rev Page ...

Page 53

... OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE VIEW A ROTATED 90° CCW ORDERING GUIDE 1 Model Temperature Range ADAU1701JSTZ 0°C to +70°C ADAU1701JSTZ-RL 0°C to +70°C EVAL-ADAU1401EBZ EVAL-ADAU1701MINIZ RoHS Compliant Part. 9.20 9.00 SQ 0.75 1.60 8.80 0.60 MAX 0. PIN 1 TOP VIEW ...

Page 54

ADAU1701 NOTES Rev Page ...

Page 55

NOTES Rev Page ADAU1701 ...

Page 56

ADAU1701 NOTES ©2007–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06412-0-2/11(A) Rev Page ...

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