AD5663R Analog Devices, AD5663R Datasheet
AD5663R
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AD5663R Summary of contents
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... The AD5623R/AD5643R/AD5663R have an on-chip reference. The AD5623R-3/AD5643R-3/AD5663R-3 have a 1. ppm/°C reference, giving a full-scale output of 2.5 V; and the AD5623R-5/ AD5643R-5/AD5663R-5 have a 2 ppm/°C reference, giving a full-scale output The on-chip reference is off at power-up, allowing the use of an external reference; and all devices can be operated from a single 2 ...
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... Microprocessor Interfacing....................................................... 25 Applications Information .............................................................. 26 Using a Reference as a Power Supply....................................... 26 Bipolar Operation Using the AD5663R .................................. 26 Using the AD5663R with a Galvanically Isolated Interface . 26 Power Supply Bypassing and Grounding................................ 27 Outline Dimensions ....................................................................... 28 Ordering Guide .......................................................................... 29 12/06—Rev Rev. A Changes to Table 2 ...
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... V ±5 ±10 ppm/°C ±10 ppm/°C 7.5 kΩ Rev Page AD5623R/AD5643R/AD5663R to T unless otherwise noted. MIN MAX, Conditions/Comments Guaranteed monotonic by design Guaranteed monotonic by design Guaranteed monotonic by design All 0s loaded to DAC register All 1s loaded to DAC register Of FSR/°C DAC code = midscale ...
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... Temperature range: B grade = −40°C to +105°C. 2 Linearity calculated using a reduced code range: AD5663R (Code 512 to Code 65,024), AD5643R (Code 128 to Code 16,256), and AD5623R (Code 32 to Code 4064). Output unloaded. 3 Guaranteed by design and characterization, not production tested. 4 Interface inactive. All DACs active. DAC outputs unloaded. ...
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... V ±5 ±15 ppm/°C ±10 ppm/°C 7.5 kΩ Rev Page AD5623R/AD5643R/AD5663R unless otherwise noted. MIN MAX Conditions/Comments Guaranteed monotonic by design Guaranteed monotonic by design Guaranteed monotonic by design All 0s loaded to DAC register All 1s loaded to DAC register Of FSR/°C DAC code = midscale ...
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... Temperature range: B grade = −40°C to +105°C. 2 Linearity calculated using a reduced code range: AD5663R (Code 512 to Code 65,024), AD5643R (Code 128 to Code 16,256), and AD5623R (Code 32 to Code 4064). Output unloaded. 3 Guaranteed by design and characterization, not production tested. 4 Interface inactive. All DACs active. DAC outputs unloaded. ...
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... CLR pulse width low ns min SCLK falling edge to LDAC falling edge ns min ns max CLR pulse activation time DB0 Figure 2. Serial Write Operation Rev Page AD5623R/AD5643R/AD5663R + V )/ ...
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... AD5623R/AD5643R/AD5663R ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 6. Parameter V to GND GND OUT GND REFIN REFOUT Digital Input Voltage to GND Operating Temperature Range Industrial Storage Temperature Range Junction Temperature (T max) J Power Dissipation LFCSP Package (4-Layer Board) θ ...
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... When using an external reference, this is the reference input pin. The default for this pin is a reference input OUT REFIN REFOUT AD5623R OUT DD AD5643R/ GND DIN 3 8 AD5663R LDAC SCLK 4 7 TOP VIEW (Not to Scale) CLR SYNC 5 6 NOTE: EXPOSED PAD TIED TO GND ON LFCSP PACKAGE. Figure 3. Pin Configuration Rev Page AD5623R/AD5643R/AD5663R ...
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... Rev Page REF T = 25° 10k 20k 30k 40k 50k CODE Figure 7. DNL—AD5663R, External Reference REF T = 25° 2.5k 5.0k 7.5k 10.0k 12.5k CODE Figure 8. DNL—AD5643R, External Reference REF T = 25°C ...
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... 2.5V REFOUT T = 25° –2 –4 –6 –8 – 10k 15k 20k 25k 30k 35k 40k 45k 50k 55k 60k 65k CODE Figure 10. INL—AD5663R 2.5V REFOUT 25° –1 –2 –3 –4 CODE Figure 11. INL—AD5643R-5 1 ...
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... Rev Page 1.25V REFOUT T = 25° 10k 15k 20k 25k 30k 35k 40k 45k 50k 55k 60k 65k CODE Figure 19. DNL—AD5663R 1.25V REFOUT T = 25°C A CODE Figure 20. DNL—AD5643R 1.25V REFOUT T = 25° ...
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... REF Figure 26. Zero-Scale Error and Offset Error vs. Temperature 1.0 MAX INL 0.5 0 –0.5 MIN DNL –1.0 MIN INL –1.5 –2.0 5.2 2.7 Rev Page AD5623R/AD5643R/AD5663R GAIN ERROR FULL-SCALE ERROR – TEMPERATURE (°C) ZERO-SCALE ERROR OFFSET ERROR – TEMPERATURE (° ...
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... AD5623R/AD5643R/AD5663R 1 25°C A 0.5 ZERO-SCALE ERROR 0 –0.5 –1.0 –1.5 –2.0 –2.5 2.7 3.2 3.7 4.2 V (V) DD Figure 28. Zero-Scale Error and Offset Error vs. Supply 25° 0.230 0.235 0.240 0.245 I (mA) DD Figure 29. I Histogram with External Reference 5. 25° ...
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... Figure 38. Digital-to-Analog Glitch Impulse (Negative) 2.498 = 5V REF 2.497 2.496 2.495 2.494 2.493 MAX(C2)* 420.0mV 2.492 2.491 0 8.0ns/pt Rev Page AD5623R/AD5643R/AD5663R SYNC SLCK V OUT CH2 500mV M400ns A CH1 Figure 37. Exiting Power-Down to Midscale REF T = 25°C ...
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... AD5623R/AD5643R/AD5663R 2.496 2.494 2.492 2.490 2.488 2.486 2.484 2.482 2.480 2.478 2.476 2.474 2.472 2.470 2.468 2.466 2.464 V REFOUT 2.462 T = 25°C A 2.460 5ns/SAMPLE NUMBER 2.458 ANALOG CROSSTALK = 4.462nV 2.456 0 50 100 150 200 250 300 SAMPLE NUMBER Figure 40. Analog Crosstalk, Internal Reference ...
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... FREQUENCY (Hz) Figure 47. Multiplying Bandwidth CH3 5. 25°C A 10M Rev Page AD5623R/AD5643R/AD5663R CLR V A OUT V B OUT CH2 1.0V M200ns A CH3 1.10V CH4 1.0V Figure 48. CLR Pulse Activation Time ...
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... AD5623R/AD5643R/AD5663R TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy or integral nonlinearity is a measurement of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. A typical INL vs. code plot is shown in Figure 5. Differential Nonlinearity (DNL) Differential nonlinearity (DNL) is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of ± ...
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... LDAC low and monitoring the output of another DAC. The energy of the glitch is expressed in nanovolts-second (nV-s). AD5623R/AD5643R/AD5663R Multiplying Bandwidth The amplifiers within the DAC have a finite bandwidth. The multiplying bandwidth is a measure of this. A sine wave on the reference (with full-scale code loaded to the DAC) appears on the output ...
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... The on-chip reference is off at power-up, and this is the default condition. The AD56x3R-3 and the AD56x3R-5 can be operated from a single 2 5.5 V supply. SERIAL INTERFACE The AD5623R/AD5643R/AD5663R have a 3-wire serial interface ( SYNC , SCLK, and DIN) that is compatible with SPI, QSPI, and MICROWIRE interface standards, as well as with most DSPs. See Figure 2 The write sequence begins by bringing the SYNC line low ...
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... The data-word comprises the 16-, 14-, and 12-bit input codes, followed by zero, two, or four don’t care bits, for the AD5663R, AD5643R, and AD5623R, respectively (see Figure 51, Figure 52, and Figure 53). The data bits are transferred to the DAC register on the 24th falling edge of SCLK ...
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... POWER-ON RESET The AD5623R/AD5643R/AD5663R contain a power-on reset circuit that controls the output voltage during power-up. The AD5623R/AD5643R/AD5663R DACs output power and the output remains there until a valid write sequence is made to the DACs. This is useful in applications where it is important to know the state of the output of the DACs while they are in the process of powering up ...
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... DAC registers are filled with the contents of the input registers. In the case of the AD5623R/AD5643R/ AD5663R, the DAC register updates only if the input register has changed since the last time the DAC register was updated, thereby removing unnecessary digital crosstalk. ...
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... AD5623R/AD5643R/AD5663R INTERNAL REFERENCE SETUP The on-chip reference is off at power-up by default. This reference can be turned on or off by setting a software programmable bit, DB0, in the control register. Table 16 shows how the state of the bit corresponds to the mode of operation. Command 111 is reserved for setting up the internal reference (see Table 8) ...
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... Data is transmitted MSB first. To load data to the AD5623R/ AD5643R/AD5663R, PC7 is left low after the first eight bits are transferred, and a second serial write operation is performed to the DAC. PC7 is taken high at the end of this procedure. ...
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... DAC is functioning. iCoupler® provides isolation in excess of 2.5 kV. The AD5663R uses a 3-wire serial logic interface, so the ADuM1300 3-channel digital isolator provides the required V ...
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... The printed circuit board containing the AD5663R should have separate analog and digital sections, each having its own area of the board. If the AD5663R system where other devices require an AGND-to-DGND connection, the connection should be made at one point only. This ground point should be as close as possible to the AD5663R ...
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... AD5623R/AD5643R/AD5663R OUTLINE DIMENSIONS PIN 1 INDEX AREA 0.80 0.75 0.70 SEATING PLANE IDENTIFIER 3.10 3.00 SQ 2.90 6 0.50 0.40 0.30 5 TOP VIEW BOTTOM VIEW 0.05 MAX 0.02 NOM 0.30 0.20 REF 0.25 0.20 Figure 63. 10-Lead Lead Frame Chip Scale Package [LFCSP_WD Body, Very Very Thin, Dual Lead (CP-10-9) Dimensions shown in millimeters 3.10 3.00 2.90 5. 3.10 4.90 3.00 4.65 1 2.90 5 PIN 1 0.50 BSC 0.95 15° MAX ...
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... AD5663RBCPZ-3REEL7 −40°C to +105°C AD5663RBCPZ-5REEL7 −40°C to +105°C AD5663RBRMZ-3 −40°C to +105°C AD5663RBRMZ-3REEL7 −40°C to +105°C AD5663RBRMZ-5 −40°C to +105°C AD5663RBRMZ-5REEL7 −40°C to +105°C EVAL-AD5663REBZ RoHS Compliant Part. AD5623R/AD5643R/AD5663R Internal Accuracy Reference Package Description ± ...
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... AD5623R/AD5643R/AD5663R NOTES Rev Page ...
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... NOTES AD5623R/AD5643R/AD5663R Rev Page ...
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... AD5623R/AD5643R/AD5663R NOTES ©2006–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05858-0-4/11(D) Rev Page ...