AD5339

Manufacturer Part NumberAD5339
Description2.5 V to 5.5 V, 250 µA, 2-Wire Interface, Dual Voltage Output,12-Bit DACs
ManufacturerAnalog Devices
AD5339 datasheet
 


Specifications of AD5339

Resolution (bits)12bitDac Update Rate14.8kSPS
Dac Settling Time8µsMax Pos Supply (v)+5.5V
Single-supplyYesDac TypeVoltage Out
Dac Input FormatI2C/Ser 2-wire  
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AD5337/AD5338/AD5339
READ OPERATION
When reading data back from the AD5337/AD5338/AD5339
DACs, the user begins with an address byte (R/ W = 0), after
which the DAC acknowledges that it is prepared to receive data
by pulling SDA low. This address byte is usually followed by the
pointer byte, which is also acknowledged by the DAC. Then, the
master initiates another start condition (repeated start) and the
address is resent with R/ W = 1. This is acknowledged by the
DAC indicating that it is prepared to transmit data. Two bytes
of data are then read from the DAC as shown in Figure 34. A
stop condition follows.
SCL
0
0
0
1
1
SDA
START
CONDITION
ADDRESS BYTE
BY
MASTER
SCL
SDA
0
0
0
REPEATED
START
ADDRESS BYTE
CONDITION
BY
MASTER
SCL
MSB
SDA
LEAST SIGNIFICANT DATA BYTE
Note that in a read sequence, data bytes are the same as those in
the write sequence, except that don’t cares are read back as 0s.
However, if the master sends an ACK and continues clocking
SCL (no stop is sent), the DAC retransmits the same two bytes
of data on SDA. This allows continuous read back of data from
the selected DAC register. Alternatively, the user can send a
start followed by the address with R/ W = 1. In this case, the
previously loaded pointer settings are used and read back of
data can begin immediately.
0
A0
R/W
X
X
ACK
MSB
BY
AD533x
0
1
1
A0
R/W
MSB
ACK
BY
AD533x
LSB
STOP
NO
CONDITION
ACK
BY
BY
MASTER
MASTER
Figure 34. Read Sequence
Rev. C | Page 18 of 28
LSB
ACK
BY
POINTER BYTE
AD533x
LSB
ACK
DATA BYTE
MASTER
BY