AD5445 Analog Devices, AD5445 Datasheet

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AD5445

Manufacturer Part Number
AD5445
Description
High Bandwidth CMOS 12-Bit Parallel Interface Multiplying D/A Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD5445

Resolution (bits)
12bit
Dac Update Rate
20.4MSPS
Dac Settling Time
80ns
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Current Out
Dac Input Format
Par

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Data Sheet
FEATURES
2.5 V to 5.5 V supply operation
Fast parallel interface (17 ns write cycle)
Update rate of 20.4 MSPS
INL of ±1 LSB for 12-bit DAC
10 MHz multiplying bandwidth
±10 V reference input
Extended temperature range: –40°C to +125°C
20-lead TSSOP and chip scale (4 mm × 4 mm) packages
8-, 10-, and 12-bit current output DACs
Upgrades to AD7524/AD7533/AD7545
Pin-compatible 8-, 10-, and 12-bit DACs in chip scale
Guaranteed monotonic
4-quadrant multiplication
Power-on reset with brownout detection
Readback function
0.4 μA typical power consumption
APPLICATIONS
Portable battery-powered applications
Waveform generators
Analog processing
Instrumentation applications
Programmable amplifiers and attenuators
Digitally controlled calibration
Programmable filters and oscillators
Composite video
Ultrasound
Gain, offset, and voltage trimming
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
R/W
CS
POWER-ON
AD5424/
AD5433/
AD5445
FUNCTIONAL BLOCK DIAGRAM
RESET
Multiplying DACs with Parallel Interface
V
GND
DD
DB0
DAC REGISTER
INPUT LATCH
8-/10-/12-BIT
V
R-2R DAC
REF
INPUTS
DATA
Figure 1.
DB7/DB9/DB11
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
8-/10-/12-Bit, High Bandwidth
GENERAL DESCRIPTION
The
current output digital-to-analog converters (DACs), respectively.
These devices operate from a 2.5 V to 5.5 V power supply,
making them suitable for battery-powered applications and
many other applications. These DACs utilize data readback,
allowing the user to read the contents of the DAC register via
the DB pins. On power-up, the internal register and latches are
filled with 0s and the DAC outputs are at zero scale.
As a result of manufacturing with a CMOS submicron process,
they offer excellent 4-quadrant multiplication characteristics,
with large signal multiplying bandwidths of up to 10 MHz.
The applied external reference input voltage (V
full-scale output current. An integrated feedback resistor (R
provides temperature tracking and full-scale voltage output
when combined with an external I-to-V precision amplifier.
While these devices are upgrades of the AD5424/AD5433/
AD5445
latched interface and cannot be used in transparent mode.
The
TSSOP packages, while the
in small, 20-lead LFCSP and TSSOP packages.
The EVAL-AD5445SDZ evaluation board is available for
evaluating DAC performance. For more information, see the
UG-333
1
U.S Patent No. 5,689,257.
AD5424/AD5433/AD5445
AD5424
R
evaluation board user guide.
in multiplying bandwidth performance, they have a
AD5424/AD5433/AD5445
is available in small, 20-lead LFCSP and 16-lead
R
I
I
OUT
OUT
FB
©2005–2011 Analog Devices, Inc. All rights reserved.
1
2
AD5433/AD5445
1
are CMOS 8-, 10-, and 12-bit
DACs are available
REF
) determines the
www.analog.com
FB
)

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AD5445 Summary of contents

Page 1

... While these devices are upgrades of the AD5424/AD5433/ AD5445 latched interface and cannot be used in transparent mode. The AD5424 TSSOP packages, while the in small, 20-lead LFCSP and TSSOP packages. The EVAL-AD5445SDZ evaluation board is available for evaluating DAC performance. For more information, see the UG-333 1 U.S Patent No. 5,689,257. FUNCTIONAL BLOCK DIAGRAM V ...

Page 2

... Added EPAD Note to Table 4 and EPAD Note to Figure 4......... 7 Added EPAD Note to Table 5 and EPAD Note to Figure 6......... 8 Added EPAD Note to Table 6 and EPAD Note to Figure 8......... 9 Deleted the Evaluation Board for AD5424/AD5433/AD5445 Section and Power Supplies for Evaluation Board Section ....... 23 Deleted Figure 59; Renumbered Sequentially ............................ 24 Deleted Figure 60 and Figure 61 ...

Page 3

... Rev Page AD5424/AD5433/AD5445 unless MIN MAX Test Conditions Guaranteed monotonic Guaranteed monotonic Guaranteed monotonic Data = 0×0000 25° OUT Data = 0×0000 −40°C to +125°C, I OUT Input resistance TC = –50 ppm/°C Input resistance TC = – ...

Page 4

... V = 3.5 V p-p, all 1s loaded 100 kHz REF Clock = 10 MHz 3.5 V REF @ 1 kHz AD5445 3.5 V REF AD5445 3.5 V REF AD5445 3.5 V REF T = 25°C, logic inputs = Logic inputs = −40°C to +125°C DD ΔV = ±5% DD ...

Page 5

... DATA VALID Figure 2. Timing Diagram Rev Page AD5424/AD5433/AD5445 + unless otherwise noted. MIN MAX Unit Test Conditions/Comments R setup time ns min ns min R hold time CS low time (write cycle) ...

Page 6

... AD5424/AD5433/AD5445 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter V to GND GND REF GND OUT OUT Logic Inputs and Output 1 Operating Temperature Range Extended Industrial (Y Version) Storage Temperature Range Junction Temperature 16-Lead TSSOP θ ...

Page 7

... Positive Power Supply Input. These parts can be operated from a supply of 2 5.5 V. DAC Reference Voltage Input Terminal. DAC Feedback Resistor Pin. Establish voltage output for the DAC by connecting to external amplifier output. The exposed pad should be connected to ground. Rev Page AD5424/AD5433/AD5445 GND 1 15 R/W ...

Page 8

... AD5424/AD5433/AD5445 OUT OUT 2 19 GND DB9 4 R/W 17 DB8 5 AD5433 16 CS (Not to Scale) DB7 DB6 DB5 DB0 (LSB DB4 DB1 9 12 DB3 DB2 CONNECT Figure 5. AD5433 Pin Configuration (TSSOP) Table 5. AD5433 Pin Function Descriptions Pin No ...

Page 9

... The exposed pad should be connected to ground. Rev Page AD5424/AD5433/AD5445 GND 1 15 R/W PIN 1 INDICATOR DB11 DB10 3 13 DB0 AD5445 DB9 4 12 DB1 TOP VIEW DB8 5 11 DB2 NOTES CONNECT. 2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND. Figure 8. AD5445 ...

Page 10

... AD5424/AD5433/AD5445 TYPICAL PERFORMANCE CHARACTERISTICS 0. 25° 10V 0.15 REF 0.10 0.05 0 –0.05 –0.10 –0.15 –0. 100 150 CODE Figure 9. INL vs. Code (8-Bit DAC) 0 25° 10V REF 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 0 200 400 600 CODE Figure 10. INL vs. Code (10-Bit DAC) 1 ...

Page 11

... MAX INL 1 0 MIN DNL MIN INL 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 V (V) BIAS Figure 19. Linearity vs. V Voltage Applied to I BIAS T = 25° REF AND 5V DD GAIN ERROR 0 OFFSET ERROR 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 V (V) BIAS Voltage Applied to I BIAS = 25° REF = 3V DD 1.4 1.5 2, AD5445 OUT 1.8 2.0 2, AD5445 OUT 1.4 1.5 2 OUT ...

Page 12

... REF AND 5V DD 1.4 1.6 1.8 2.0 Voltage Applied Figure 24. Supply Current vs. Logic Input Voltage (Driving DB0 to DB11, OUT 2.0 2.5 2, AD5445 OUT 0.50 0.45 0.40 0.35 0.30 MAX INL 0.25 0.20 0.15 0.10 0.05 2.0 2, AD5445 OUT Rev Page 2. 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VOLTAGE (V) All Other Digital Inputs qt Supplies) 1 ...

Page 13

... FREQUENCY (Hz) Figure 28. Reference Multiplying Bandwidth vs. Frequency and Code 0.2 0 –0.2 –0 25° –0 ±3.5V REF C = 1.8pF COMP AD8038 AMPLIFIER AD5445 DAC –0 100 1k 10k 100k FREQUENCY (Hz) Figure 29. Reference Multiplying Bandwidth—All 1s Loaded 2.5V 1M 10M 100M 0.045 ...

Page 14

... OUT Figure 37. Wideband SFDR vs. f Frequency OUT AMP = AD8038 AD5445 65k CODES FREQUENCY (MHz) Figure 38. Wideband SFDR 100 kHz, Clock = 25 MHz OUT Data Sheet 160 180 200 800 900 1000 = 25°C ...

Page 15

... FREQUENCY (kHz) Figure 42. Narrow-Band SFDR 100 kHz, MCLK = 25 MHz OUT AMP = AD8038 AD5445 65k CODES 200 250 300 350 400 450 500 550 FREQUENCY (kHz) = 400 kHz, 500 kHz, Clock = 10 MHz OUT ...

Page 16

... AMP = AD8038 AD5445 65k CODES 300 350 400 Rev Page AMP = AD8038 AD5445 65k CODES 100 120 140 160 FREQUENCY (kHz kHz, 50 kHz, Clock = 10 MHz OUT Data Sheet = 25° 180 200 ...

Page 17

... Narrow-band SFDR is a measure of SFDR over an arbitrary window size, in this case, 50% of the fundamental. Digital SFDR is a measure of the usable dynamic range of the DAC when the signal is a digitally generated sine wave. Rev Page AD5424/AD5433/AD5445 OUT 1 terminal when all 0s are OUT ( ...

Page 18

... REF Rev Page 255 (8-bit AD5424 1023 (10-bit AD5433 4095 (12-bit AD5445) power pin is only used by the internal DD Analog Output (V) –V (255/256) REF –V (128/256) = –V REF V (1/256) ...

Page 19

... REF where D is the fractional representation of the digital word loaded to the DAC and n is the resolution of the DAC 255 (8-bit AD5424 1023 (10-bit AD5433 4095 (12-bit AD5445) When signal, the circuit performs 4-quadrant IN multiplication. Table 8 shows the relationship between digital code and the expected output voltage for bipolar operation (AD5424, 8-bit device) ...

Page 20

... OUT configuration, the output voltage is given × × (V − V OUT FB DAC BIAS As D varies from 0 to 255 (AD5424 1023 (AD5433 4095 (AD5445), the output voltage varies from − V OUT BIAS OUT BIAS IN V should be a low impedance source capable of sinking and ...

Page 21

... FB where R is the DAC resistance at the V For a DAC leakage current kΩ, and a gain (that is, 1/D) of 16, the error voltage is 1.6 mV. Rev Page AD5424/AD5433/AD5445 . However, if the IN —an error of 3% even though the DAC itself has ...

Page 22

... REFERENCE SELECTION When selecting a reference for use with the AD5424/AD5433/ AD5445 family of current output DACs, pay attention to the reference’s output voltage temperature coefficient specification. This parameter not only affects the full-scale error, but can also affect the linearity (INL and DNL) performance. The reference temperature coefficient should be consistent with the system accuracy specifications ...

Page 23

... ADRR 19 ADSP-BF5xx AMSx AD5424/ AWE AD5433/ AD5445* CS R/W DATA 0 TO DATA 23 DB0 TO DB11 *ADDITIONAL PINS OMITTED FOR CLARITY Figure 58. Interface Rev Page AD5424/AD5433/AD5445 Interface ADDRESS BUS AD5424/ AD5433/ AD5445* ADDRESS CS DECODER R/W DB0 TO DB11 8-BIT LATCH DATA BUS 8xC51-to-AD5424/AD5433/AD5445 Interface Interface and the ADSP-BF5xx family of DSPs ...

Page 24

... AD5450 8 1 AD5432 10 1 AD5433 10 1 AD5439 10 2 AD5440 10 2 AD5451 10 1 AD5443 12 1 AD5444 12 1 AD5415 12 2 AD5405 12 2 AD5445 12 2 AD5447 12 2 AD5449 12 2 AD5452 12 1 AD5446 14 1 AD5453 14 1 AD5553 14 1 AD5556 14 1 AD5555 14 2 AD5557 14 2 AD5543 ...

Page 25

... Figure 59. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters 6.60 6.50 6. 4.50 4.40 4.30 6.40 BSC 1 10 PIN 1 0.65 BSC 1.20 MAX 0.15 0.20 0.05 0.09 0.30 0.19 SEATING 0.10 PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AC Figure 60. 20-Lead Thin Shrink Small Outline Package [TSSOP] (RU-20) Dimensions shown in millimeters Rev Page AD5424/AD5433/AD5445 0.75 8° 0.60 0° 0.45 0.75 8° 0.60 0° 0.45 ...

Page 26

... AD5424YCPZ 8 AD5424YCPZ-REEL7 8 AD5433YRU 10 AD5433YRU-REEL 10 AD5433YRU-REEL7 10 AD5433YRUZ 10 AD5433YRUZ-REEL 10 AD5433YRUZ-REEL7 10 AD5433YCPZ 10 AD5445YRU 12 AD5445YRU-REEL 12 AD5445YRU-REEL7 12 AD5445YRUZ 12 AD5445YRUZ-REEL 12 AD5445YRUZ-REEL7 12 AD5445YCPZ 12 EVAL-AD5445EBZ RoHS Compliant Part. 0.60 MAX 4.00 BSC SQ 0.60 MAX 15 16 0.50 3.75 BSC BCS SQ (BOTTOM VIEW 0.75 TOP VIEW 0.60 0.50 0.80 MAX FOR PROPER CONNECTION OF 0.65 TYP THE EXPOSED PAD, REFER TO ...

Page 27

... Data Sheet NOTES AD5424/AD5433/AD5445 Rev Page ...

Page 28

... AD5424/AD5433/AD5445 NOTES ©2005–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03160-0-12/11(C) Rev Page Data Sheet ...

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