ADV7127 Analog Devices, ADV7127 Datasheet
ADV7127
Specifications of ADV7127
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ADV7127 Summary of contents
Page 1
... D/A converter with on-board voltage reference, comple- mentary outputs, a standard TTL input interface and high impedance analog output current sources. The ADV7127 has a 10-bit wide input port. A single +5 V/ +3.3 V power supply and clock are all that are required to make the part functional. ...
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... ADV7127–SPECIFICATIONS 5 V SOIC SPECIFICATIONS Parameter STATIC PERFORMANCE Resolution (Each DAC) Integral Nonlinearity (BSL) Differential Nonlinearity DIGITAL AND CONTROL INPUTS Input High Voltage Input Low Voltage Input Current PSAVE Pull-Up Current Input Capacitance ANALOG OUTPUTS Output Current ...
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... MHz and 140 MHz + 240 MHz. MIN MAX 2 This power-down feature is only available on the ADV7127 in the TSSOP package. 3 Gain error = ((Measured (FSC)/Ideal (FSC) –1) 4 Internal voltage reference is available only on the ADV7127 TSSOP package. ...
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... ADV7127–SPECIFICATIONS 3.3 V SOIC SPECIFICATIONS Parameter STATIC PERFORMANCE Resolution (Each DAC) Integral Nonlinearity (BSL) Differential Nonlinearity DIGITAL AND CONTROL INPUTS Input High Voltage Input Low Voltage Input Current PSAVE Pull-Up Current Input Capacitance ANALOG OUTPUTS Output Current Output Compliance Range, V ...
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... MHz and 140 MHz + 240 MHz. MIN MAX 3 This power-down feature is only available on the ADV7127 in the TSSOP package. 4 Gain error = ((Measured (FSC)/Ideal (FSC) –1) 5 Internal voltage reference is available only on the ADV7127 TSSOP package. ...
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... Measured from 50% point of full-scale transition final value. 6 Guaranteed by characterization max specification production tested at 125 MHz and 5 V. Limits specified here are guaranteed by characterization. CLK 8 This power-down feature is only available on the ADV7127 in the TSSOP package. Specifications subject to change without notice V–5. 1.235 ...
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... Measured from 50% point of full-scale transition final value. 6 Guaranteed by characterization max specification production tested at 125 MHz and 5 V limits specified here are guaranteed by characterization. CLK 8 This power-down feature is only available on the ADV7127 in the TSSOP package. Specifications subject to change without notice. CLOCK DIGITAL INPUTS (D9–D0) ANALOG OUTPUTS (I , ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADV7127 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... Power Save Control Pin. The part is put into standby mode when PSAVE is low. The internal voltage reference circuit is still active on the TSSOP in this case. PDOWN Power-Down Control Pin (24-Lead TSSOP Only). The ADV7127 completely powers down, including the voltage reference circuit, when PDOWN is low. TERMINOLOGY ...
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... ADV7127 5 V–Typical Performance Characteristics ( 1.235 17. REF OUT 70 60 SFDR (DE) 50 SFDR (SE 0.1 1.0 2.51 5.04 20.2 40.4 100 FREQUENCY – MHz Figure 2. SFDR vs OUT CLOCK 140 MHz (Single-Ended and Differential 2nd HARMONIC 72 3rd HARMONIC 70 4th HARMONIC 68 66 ...
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... OUT Figure 15. Linearity vs. I –5 3.3V CLK = 140MHz AA f OUT SING O/P –45.0 –85.0 0kHz 35.0MHz START Figure 18. Single-Tone SFDR @ f = 140 MHz ( MHz) CLOCK OUT1 –11– ADV7127 = + 72.0 71.8 SFDR (f = 1MHz) OUT 71.6 71.4 71.2 71.0 70.8 70.6 70 100 TEMPERATURE – Figure 13. SFDR vs. Temperature @ CLOCK f ...
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... The required CLOCK frequency is thus 78.6 MHz. All video data and control inputs are latched into the ADV7127 on the rising edge of CLOCK, as previously described in the Digital Inputs section recommended that the CLOCK input to the ADV7127 be driven by a TTL buffer (e.g., 74F244). I OUT ...
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... The on-board operational amplifier stabilizes the full-scale output current against temperature and power supply variations. Analog Output The analog output of the ADV7127 is a high impedance current source. The current output is capable of directly driving a 37.5 load, such as a doubly terminated 75 ...
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... It is important to note that while the ADV7127 contains cir- cuitry to reject power supply noise, this rejection decreases with frequency high frequency switching power supply is used, the designer should pay close attention to reducing power sup- ply noise ...
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... Digital signal lines should not overlay the analog power plane. Due to the high clock rates used, long clock lines to the ADV7127 should be avoided minimize noise pickup. Any active pull-up termination resistors for the digital inputs should be connected to the regular PCB power plane (V not the analog power plane ...
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... ADV7127 0.0118 (0.30) 0.0040 (0.10) 0.006 (0.15) 0.002 (0.05) SEATING PLANE OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Lead SOIC (R-28) 0.7125 (18.10) 0.6969 (17.70 PIN 1 0.1043 (2.65) 0.0926 (2.35) 0.0500 0.0192 (0.49) SEATING 0.0125 (0.32) (1.27) 0.0138 (0.35) PLANE BSC 0.0091 (0.23) 24-Lead TSSOP (RU-24) 0.311 (7.90) 0.303 (7.70 PIN 1 0.0433 (1.10) MAX 8° 0.0256 (0.65) 0.0118 (0.30) 0° ...