ADP5065 Analog Devices, ADP5065 Datasheet - Page 18

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ADP5065

Manufacturer Part Number
ADP5065
Description
Fast Charge Battery Management with Power Path and USB Compatibility
Manufacturer
Analog Devices
Datasheet

Specifications of ADP5065

Product Description
Fast Charge Battery Management with Power Path and USB Compatibility
Switching/linear
Switching
Cell Type
Li-Ion
Final Voltage Options
4.2
Accuracy Over Temp (%)
0.3%
Temp Range
-40 to +125°C
Package
WLCSP-20
Active For Param Search
Yes
ADP5065
Weak Charge Mode (Constant Current)
When the battery voltage exceeds V
V
During the weak charge mode, the battery voltage is too low
to allow the full system to power-up. Due to the low level of
the battery, the USB transceiver cannot be powered and,
therefore, cannot enumerate for more current from a USB
host. Consequently, the USB limit remains at 100 mA.
The system microcontroller may or may not be powered by
the charger output voltage (V
amount of current required by the microcontroller and/or the
system architecture. In this case, the battery charge current
(I
microcontroller can still operate (if doing so) nor increased
above the 100 mA USB limit. Thus, set the battery charging
current as follows:
Fast Charge Mode (Constant Current)
When the battery voltage exceeds V
charger switches to fast charge mode, charging the battery
with the constant current, I
(constant current), the CHARGER_STATUS register is set.
During constant current mode, other features may prevent
the current, I
Isothermal charging mode or input current limiting for USB
compatibility may affect the value of I
ating conditions. The voltage on ISO_Sx is regulated to stay at
V
WEAK
CHG_WEAK
ISO_SFC
Set the default 20 mA via the linear trickle charger branch
(to ensure that the microprocessor remains alive if
powered by the main switching charger output, ISO_Sx).
Any residual current on the main switching charger
output, ISO_Sx, is used to charge the battery at up to the
preprogrammed level in the I
current limit) or I
During weak current mode, other features may prevent
the actual programmed weak charging current from
reaching its full programmed value. Isothermal charging
mode or input current limiting for USB compatibility may
affect the programmed weak charging current value under
certain operating conditions. During weak charging, the
ISO_Sx node is regulated to V
isolation FET.
, the charger switches to the intermediate charge mode.
by the battery isolation FET when V
) cannot be increased above 20 mA to ensure the
CHG
, from reaching its full programmed value.
LIM
(input current limit).
CHG
ISO_SFC
. During fast charge mode
2
) depending upon the
C for I
ISO_SFC
TRK_DEAD
TRK_DEAD
CHG
by the battery
CHG
under certain oper-
but is less than
and V
ISO_B
(fast charge
< V
WEAK
ISO_SFC
, the
.
Rev. A | Page 18 of 40
Fast Charge Mode (Constant Voltage)
As the battery charges, its voltage rises and approaches the termi-
nation voltage, V
on the BAT_SNS pin to determine when charging should end.
However, the internal ESR of the battery pack combined with
PCB and other parasitic series resistances creates a voltage
drop between the sense point at the BAT_SNS pin and the cell
terminal itself. To compensate for this and ensure a fully charged
cell, the
the termination voltage is detected on the BAT_SNS pin. The
ADP5065
to charge, maintaining a voltage of V
During fast charge mode (constant voltage), the CHARGER_
STATUS register is set.
Fast Charge Mode Timer
The duration of fast charge mode is monitored to ensure that
the battery is charging correctly. If the fast charge mode runs
for longer than t
reaching V
The fault condition is asserted on the CHARGER_STATUS reg-
ister allowing the user to initiate the fault recovery procedure
specified in the Fault Recovery section.
If the fast charge mode runs for longer than t
has been reached on the BAT_SNS pin but the charge current
has not yet fallen below I
tion is asserted in this circumstance and charging resumes as
normal if the recharge threshold is breached.
Watchdog Timer
The
timer function to ensure charging is under the control of the
processor. The watchdog timer starts running when the
ADP5065
operational, that is, when the processor sets the RESET_WD
bit for the first time or when the battery voltage is greater
than the weak battery threshold, V
timer has been triggered, it must be reset regularly within the
watchdog timer period, t
If the watchdog timer expires without being reset while in
charger mode, the
problem and triggers the safety timer, t
mation see the Safety Timer section.
ADP5065
ADP5065
reduces charge current gradually as the cell continues
charger determines that the processor should be
TRM
, a fault condition is assumed and charging stops.
charger features a programmable watchdog
TRM
CHG
enters a constant voltage charging mode when
ADP5065
. The
without the voltage at the BAT_SNS pin
ADP5065
WD
END
.
, charging stops. No fault condi-
charger assumes there is a software
charger monitors the voltage
WEAK
TRM
on the BAT_SNS pin.
. When the watchdog
SAFE
. For more infor-
CHG
, and V
Data Sheet
TRM

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