ADP5065 Analog Devices, ADP5065 Datasheet - Page 4

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ADP5065

Manufacturer Part Number
ADP5065
Description
Fast Charge Battery Management with Power Path and USB Compatibility
Manufacturer
Analog Devices
Datasheet

Specifications of ADP5065

Product Description
Fast Charge Battery Management with Power Path and USB Compatibility
Switching/linear
Switching
Cell Type
Li-Ion
Final Voltage Options
4.2
Accuracy Over Temp (%)
0.3%
Temp Range
-40 to +125°C
Package
WLCSP-20
Active For Param Search
Yes
ADP5065
Parameter
BATTERY ISOLATION FET
HIGH VOLTAGE BLOCKING FET
THERMAL CONTROL
THERMISTOR CONTROL
JEITA SPECIFICATION
JEITA Typical Temperature
Bump to Bump Resistance Between
Regulated System Voltage
Battery Supplementary Threshold
VINx Input
VINx Transition Timing
Isothermal Charging Temperature
Thermal Early Warning Temperature
Thermal Shutdown Temperature
Thermistor Current
Thermistor Capacitance
Cold Temperature Threshold
Resistance Thresholds
Hot Temperature Threshold
JEITA Cold Temperature
JEITA Cool Temperature
ISO_Bx and ISO_Sx Bumps
High Voltage Blocking FET On
Current, Suspend Mode
Input Voltage
Overvoltage Threshold
Overvoltage Threshold Hysteresis
Minimum Rise Time for VINx from
Minimum Fall Time for VINx from
10,000 NTC
100,000 NTC
Cool to Cold Resistance
Cold to Cool Resistance
Resistance Thresholds
Resistance Thresholds
Resistance Thresholds
Resistance Thresholds
Resistance
Good Threshold
5 V to 12 V
4 V to 0 V
Hot to Typical Resistance
Typical to Hot Resistance
Cool to Cold Resistance
Cold to Cool Resistance
Typical to Cool Resistance
Cool to Typical Resistance
Warm to Typical Resistance
Typical to Warm Resistance
Rising
Falling
4
V
Symbol
R
V
R
I
V
V
V
t
t
T
T
T
I
I
C
T
R
R
T
R
R
T
R
R
T
R
R
T
R
R
SUSPEND
NTC_10k
NTC_100k
VIN_RISE
VIN_FALL
DSONISO
DSONHV
LIM
SDL
SD
NTC_COLD
COLD_FALL
COLD_RISE
NTC_HOT
HOT_FALL
HOT_RISE
JEITA_COLD
COLD_FALL
COLD_RISE
JEITA_COOL
TYP_FALL
TYP_RISE
JEITA_TYP
WARM_FALL
WARM_RISE
ISO_SFC
THISO
VIN_OK_RISE
VIN_OK_FALL
VIN_OV
NTC
Min
3.15
0
3.78
5.35
10
10
24,050
23,100
2990
2730
24,050
23,100
15,200
14,500
4710
4320
Rev. A | Page 4 of 40
Typ
76
3.3
5
340
1.3
3.9
3.6
5.42
75
115
130
140
110
0
27,300
26,200
60
3310
3030
0
27,300
26,200
10
17,800
17,000
5400
4950
Max
115
3.45
10
455
2.5
4.0
3.67
5.5
400
40
100
30,600
29,400
3640
3330
30,600
29,400
20,400
19,500
6100
5590
Unit
V
mV
mA
V
V
V
mV
μs
μs
°C
°C
°C
°C
μA
μA
pF
°C
Ω
Ω
°C
Ω
Ω
°C
Ω
Ω
°C
Ω
Ω
°C
Ω
Ω
Test Conditions/Comments
Includes bump resistances and battery isolation
PMOS on resistance; on battery supplement
mode, V
V
V
I
EN_CHG = low
T
T
No battery charging occurs
No battery charging occurs
No battery charging occurs
Battery charging occurs at 50% of
programmed level
Normal battery charging occurs at
default/programmed levels
IN
J
J
TRK_DEAD
ISO_S[1:2]
rising
falling
= 500 mA
< V
IN
< V
= 0 V, V
ISO_B[1:2]
BAT_SNS
, fast charging CC mode
, V
ISO_B
SYS
= 3.6 V, I
rising
Data Sheet
ISO_B
= 500 mA

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