ADP5020 Analog Devices, ADP5020 Datasheet - Page 18

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ADP5020

Manufacturer Part Number
ADP5020
Description
Power Management Unit for Imaging Modules
Manufacturer
Analog Devices
Datasheet
ADP5020
Activation Waveforms
When activated through the EN pin, the sequencer is affected
only by the I
good masking bits: Bit 3 (BK1_XSHTDN), Bit 2 (BK2_XSHTDN),
and Bit 1 (LDO_XSHTDN) in the OPERATIONAL_CONTROL
register (Address 0x04). See the Default Power-On Sequence with
EN Pin section for more information. The sequence order of the
regulators is factory programmed through fuses, but the delays
INTERNAL
INTERNAL
XSHTDN
XSHTDN
I
I
BUCK 1
BUCK 2
BUCK 1
BUCK 2
2
2
C BUS
C BUS
VDDx
VDDx
2
POR
POR
POR
POR
C commands that set or clear the regulator power
LDO
LDO
EN
EN
I
PROGRAMMING
2
C SEQUENCER
REGISTERS
V
I
PROGRAMMING
2
UVLOR
C SEQUENCER
REGISTERS
t
t
REG1
REG1
ALL = 1
EN_
Figure 23. Regulators Are Activated by I
Figure 24. Activation Command Using the EN Pin
Rev. 0 | Page 18 of 28
t
t
REG2
REG2
POK
POK
t
t
REG3
REG3
between the regulators (t
be changed.
The EN_ALL bit (Bit 4) in the REG_CONTROL_STATUS regi-ster
(Address 0x03) has the same functionality as the EN pin. The
sequencer has an antiglitch function that allows it to ignore supply
voltage dip if glitch time is less than 50 μs (see Figure 25).
POK
POK
2
C Command
t
t
XSHTDN
XSHTDN
POK
POK
REG1
, t
REG2
ALL = 0
EN_
, and t
REG3
) are fixed and cannot

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